DSPIC30F5011-20E/PT Microchip Technology, DSPIC30F5011-20E/PT Datasheet - Page 3

• Manufacturer Part Number: DSPIC30F5011-20E/PT
• Description: IC,DSP,16-BIT,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F5011-20E/PT

• Rohs Compliant: YES
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 66KB (22K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F5011-20E/PTG; DSPIC30F501120EPT; DSPIC30F501120EPT

TABLE 2:
© 2010 Microchip Technology Inc.
Operations
Note 1:
EEPROM
Memory
Module
Sleep
Mode
Timer
Flash
Data
CAN
ADC
PSV
PLL
I
I
I
I
I
I/O
I/O
2
2
2
2
2
C
C
C
C
C
Only those issues indicated in the last column apply to the current silicon revision.
Consumption
Bus Collision
RC15 Pin for
RX Filters 3,
Sleep Mode
Slave Mode
Multiplexed
Lock Status
I
Addressing
Addressing
Addressing
DD
Feature
with IC1
in Sleep
Port Pin
SILICON ISSUE SUMMARY (CONTINUED)
4 and 5
Current
Digital
10-bit
10-bit
10-bit
Mode
Current
I/O
bit
—
—
—
Number
Item
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.
26.
27.
28.
29.
30.
Execution of the Sleep instruction (PWRSAV #0) may cause
incorrect program operation after the device wakes up from
Sleep. The current consumption during Sleep may also
increase beyond the specifications listed in the device data
sheet.
The I
an I
The Port I/O pin multiplexed with the Input Capture 1 (IC1)
function cannot be used as a digital input pin when the UART
auto-baud feature is enabled.
When the I
using the same address bits (A10 and A9) as other I
devices, the A10 and A9 bits may not work as expected.
Clock switching prevents the device from waking up from
Sleep.
The PLL LOCK Status bit (OSCCON<5>) can occasionally
get cleared and generate an oscillator failure trap even when
the PLL is still locked and functioning correctly.
An address error trap occurs in certain addressing modes
when accessing the first four bytes of any PSV page.
The 10-bit slave does not set the RBF flag or load the
I2CxRCV register on address match if the Least Significant
bits (LSbs) of the address are the same as the 7-bit reserved
addresses.
When the I
address of 0x102, the I2CxRCV register content for the lower
address byte is 0x01 rather than 0x02.
When the I
generates a glitch on the SDA and SCL pins, causing a false
communication start in a single-master configuration or a bus
collision in a multi-master configuration.
The Most Significant bit (MSb) of every fourth byte in data
EEPROM may be corrupted
This release of silicon exhibits a current draw (I
approximately 190 mA during a Row Erase operation
performed on program Flash memory.
For this revision of silicon, if the pin RC15 is required for digital
input/output, the FPR<4:0> bits in the FOSC Configuration
register may not be set up for FRC w/PLL 4x/8x/16x modes.
CAN Receive filters 3, 4 and 5 may not work for a given
combination of instruction cycle speed and CAN bit time
quanta.
If the ADC module is in an enabled state when the device
enters Sleep Mode, the power-down current (I
device may exceed the device data sheet specifications.
2
C slave.
2
C module loses incoming data bytes when operating as
2
2
2
C module is configured for 10-bit addressing
C module is configured as a 10-bit slave with an
C module is enabled, the dsPIC
Issue Summary
.
dsPIC30F5011/5013
®
DSC device
PD
DD
) of the
) of
2
C
A1 A2 A3 A4
DS80453E-page 3
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Revisions
Affected
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
(1)
X
X
X
X
X
X
X
X
X
X
X