EP9301-IQZ Cirrus Logic Inc, EP9301-IQZ Datasheet - Page 255
![32-Bit Microcontroller IC](/photos/12/23/122383/mfg_ep9301_parts_sml.jpg)
EP9301-IQZ
Manufacturer Part Number
EP9301-IQZ
Description
32-Bit Microcontroller IC
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9301-IQZ
Controller Family/series
(ARM9)
Core Size
32 Bit
A/d Converter
12 Bits
Supply Voltage
3.3V
No. Of I/o Pins
24
Mounting Type
Surface Mount
Operating Temperature Min
-40°C
Package / Case
208-LQFP
Core Processor
ARM9
Speed
166MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1250
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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LUT Registers
GrySclLUTR,
GrySclLUTG,
DS785UM1
GrySclLUTB
31
15
Address:
Default:
Definition: Grayscale Look-Up-Tables
Bit Descriptions:
30
14
29
13
28
12
RATE:
GrySclLUTR - 0x8003_0080 through 0x8003_00FC
GrySclLUTG - 0x8003_0280 through 0x8003_02FC
GrySclLUTB - 0x8003_0300 through 0x8003_037C
0x0000_FFFF in offset locations 0x7, 0x15, 0x23, and 0x31
0x0000_0000 in all other locations
RSVD:
FRAME:
27
11
26
10
Copyright 2007 Cirrus Logic
RSVD
25
9
When EN = ‘0’ and the 2-bit cursor pixel fetched from
SDRAM is ‘10’,
cursor image.
When EN = ‘0’ and the 2-bit cursor pixel fetched from
SDRAM is ‘11’,
cursor image.
Rate - Read/Write
When EN = ‘1’, the Rate value written to this field specifies
the number of video frames that will occur before switching
between CursorColor1 or CursorColor2, and
CursorBlinkColor1 or CursorBlinkColor2, respectively.
An on/off cursor blink cycle is controlled by the equation:
Blink Cycle =
Reserved - Unknown during read
Frame Counter Selection - Read/Write
Raster Engine With Analog/LCD Integrated Timing and Interface
24
8
D
23
7
2 x (1/VCLK) x HClkTotal.Total x
CursorColor1,
CursorColor1,
22
6
21
5
VLinesTotal.Total x (255 - RATE)
20
is used for the non-blinking
4
is used for the non-blinking
19
3
EP93xx User’s Guide
FRAME
18
2
VERT
17
1
HORZ
16
7-73
0
7
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