EP9301-IQZ Cirrus Logic Inc, EP9301-IQZ Datasheet - Page 385

• Manufacturer Part Number: EP9301-IQZ
• Description: 32-Bit Microcontroller IC
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9301-IQZ

• Controller Family/series: (ARM9)
• Core Size: 32 Bit
• A/d Converter: 12 Bits
• Supply Voltage: 3.3V
• No. Of I/o Pins: 24
• Mounting Type: Surface Mount
• Operating Temperature Min: -40°C
• Package / Case: 208-LQFP
• Core Processor: ARM9
• Speed: 166MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1250

TXStsQBLen
DS785UM1
31
15
Soft Reset:
Definition:
Bit Descriptions:
Address:
Chip Reset:
Soft Reset:
Definition:
Bit Descriptions:
30
14
29
13
28
12
0x0000_0000
Unchanged
Transmit Status Queue Base Address. The Transmit Status Queue Base
Address defines the system memory address of the transmit status queue.
This address is used by the MAC to reload the Transmit Current Status
Address whenever the end of the status queue is reached. The base address
should be set at initialization time and must be set to a word aligned memory
address.
TSQBA:
0x8001_00C4 - Read/Write
0x0000_0000
Unchanged
Transmit Status Queue Base Length. The Transmit Status Queue Base
Length defines the actual number of bytes in the transmit status queue. The
length should be set at initialization time and must define an integral number
of transmit statuses.
RSVD:
TSQBL:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Transmit Status Queue Base Address.
Reserved. Unknown During Read.
Transmit Status Queue Base Length.
24
8
TSQBL
RSVD
23
7
22
6
21
1/10/100 Mbps Ethernet LAN Controller
5
20
4
19
3
EP93xx User’s Guide
18
2
17
1
16
9-83
0
9