EP9301-IQZ Cirrus Logic Inc, EP9301-IQZ Datasheet - Page 359
![32-Bit Microcontroller IC](/photos/12/23/122383/mfg_ep9301_parts_sml.jpg)
EP9301-IQZ
Manufacturer Part Number
EP9301-IQZ
Description
32-Bit Microcontroller IC
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9301-IQZ
Controller Family/series
(ARM9)
Core Size
32 Bit
A/d Converter
12 Bits
Supply Voltage
3.3V
No. Of I/o Pins
24
Mounting Type
Surface Mount
Operating Temperature Min
-40°C
Package / Case
208-LQFP
Core Processor
ARM9
Speed
166MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1250
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 359 of 824
- Download datasheet (13Mb)
TestCtl
IntEn
DS785UM1
31
15
31
15
RSVD / RWIE
Address:
Chip Reset:
Soft Reset:
Definition:
Bit Descriptions:
RSVD
30
14
30
14
RxMIE
RSVD
29
13
29
13
RxBIE
MIIIE
28
12
28
12
0x8001_0008 - Read/Write
0x0000_0000
0x0000_0000
Test Control Register
RSVD:
MACF:
MFDX:
DB:
RSVD
RxSQIE
PHYSIE
27
11
27
11
TxLEIE
TIE
26
10
26
10
Copyright 2007 Cirrus Logic
RSVD
ECIE
25
25
9
9
Reserved. Unknown During Read.
MAC Fast. When set, internal MAC timers for link pulses
and collision backoff are scaled in order to speed-up
controller testing. When clear, normal timing is used.
MAC Full Duplex. This bit is used to enable full duplex
operation, when set, the transmitter ignores carrier sense
for transmit deferral. For normal loopback testing this bit
should be set.
Disable backoff. When set, the backoff algorithm is
disabled. The MAC transmitter looks only for completion of
the Inter Frame Gap before starting transmission. When
clear, the backoff algorithm is used as described in
Section 9.1.4 on page
TxUHIE
SWIE
24
24
8
8
RSVD
MACF
23
23
7
7
MFDX
22
22
6
6
RSVD
9--7.
RSVD
DB
21
21
1/10/100 Mbps Ethernet LAN Controller
5
5
20
20
4
4
TSQIE
19
19
3
3
EP93xx User’s Guide
REOFIE
RSVD
MOIE
18
18
2
2
REOBIE
TxCOIE
17
17
1
1
RxROIE
RHDRIE
16
16
9-57
0
0
9
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