PIC12C672-10/P Microchip Technology, PIC12C672-10/P Datasheet - Page 235

• Manufacturer Part Number: PIC12C672-10/P
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,8PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672-10/P

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Processor Series: PIC12C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 1
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

15.3.8
INTCON
PIR
PIE
SSPBUF
SSPCON WCOL SSPOV SSPEN
TRISA
TRISC
SSPSTAT
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by the SSP in SPI
Note 1: The position of this bit is device dependent.
1997 Microchip Technology Inc.
Name
2: These bits may also be named GPIE and GPIF.
mode.
Effects of a Reset
Synchronous Serial Port Receive Buffer/Transmit Register
PORTC Data Direction Control Register
Bit 7
SMP
GIE
—
PEIE
A reset disables the SSP module and terminates the current transfer.
Table 15-1: Registers Associated with SPI Operation
Bit 6
CKE
—
PORTA Data Direction Register
Bit 5
T0IE
D/A
INTE
Bit 4
CKP
P
SSPIF
SSPIE
RBIE
SSPM3 SSPM2 SSPM1 SSPM0
Bit 3
(1)
(1)
S
(2)
Bit 2
T0IF
R/W
INTF
Bit 1
UA
Section 15. SSP
RBIF
Bit 0
BF
(2)
0000 000x
xxxx xxxx
0000 0000
--11 1111
1111 1111
0000 0000
Value on
POR,
BOR
0
0
DS31015A-page 15-15
other resets
Value on all
0000 000u
uuuu uuuu
0000 0000
--11 1111
1111 1111
0000 0000
0
0
15