PIC16F676-E/ML Microchip Technology, PIC16F676-E/ML Datasheet - Page 16

1.75KB Flash, 64 RAM, 12 I/O 16 QFN 4x4mm TUBE

PIC16F676-E/ML

Manufacturer Part Number
PIC16F676-E/ML
Description
1.75KB Flash, 64 RAM, 12 I/O 16 QFN 4x4mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F676-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFN
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC16F630/676
2.2.2.4
The PIE1 register contains the interrupt enable bits, as
shown in Register 2-4.
REGISTER 2-4:
DS40039F-page 16
bit 7
bit 6
bit 5-4
bit 3
bit 2-1
bit 0
PIE1 Register
PIE1 — PERIPHERAL INTERRUPT ENABLE REGISTER 1 (ADDRESS: 8Ch)
bit 7
EEIE: EE Write Complete Interrupt Enable bit
1 = Enables the EE write complete interrupt
0 = Disables the EE write complete interrupt
ADIE: A/D Converter Interrupt Enable bit (PIC16F676 only)
1 = Enables the A/D converter interrupt
0 = Disables the A/D converter interrupt
Unimplemented: Read as ‘0’
CMIE: Comparator Interrupt Enable bit
1 = Enables the comparator interrupt
0 = Disables the comparator interrupt
Unimplemented: Read as ‘0’
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
Legend:
R = Readable bit
- n = Value at POR
R/W-0
EEIE
R/W-0
ADIE
U-0
W = Writable bit
‘1’ = Bit is set
U-0
Note:
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CMIE
Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
U-0
 2010 Microchip Technology Inc.
x = Bit is unknown
U-0
TMR1IE
R/W-0
bit 0

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