PIC16F870-E/SO Microchip Technology, PIC16F870-E/SO Datasheet - Page 177
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PIC16F870-E/SO
Manufacturer Part Number
PIC16F870-E/SO
Description
28 PIN, 3.5KB ENH FLASH, 128 RAM, 22 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F870-ISO.pdf
(172 pages)
4.PIC16F870-ISO.pdf
(6 pages)
Specifications of PIC16F870-E/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB16F871 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F870-ISO PDF datasheet #3
- PIC16F870-ISO PDF datasheet #4
- Current page: 177 of 688
- Download datasheet (3Mb)
11.6.2
1997 Microchip Technology Inc.
Initialization
Since Timer0 has a software programmable clock source, there are two examples to show the
initialization of Timer0 with each source.
clock source (timer mode), while
source (counter mode).
Example 11-3: Timer0 Initialization (Internal Clock Source)
Example 11-4: Timer0 Initialization (External Clock Source)
;**
;**
;
; The TMR0 interrupt is disabled, do polling on the overflow bit
;
T0_OVFL_WAIT
; Timer has overflowed
;** BSF
;** BSF
;
; The TMR0 interrupt is disabled, do polling on the overflow bit
;
T0_OVFL_WAIT
; Timer has overflowed
CLRF
CLRF
BSF
MOVLW
MOVWF
BCF
BTFSS
GOTO
CLRF
CLRF
BSF
MOVLW
MOVWF
BCF
BSF
BSF
BTFSS
GOTO
TMR0
INTCON
STATUS, RP0
0x37
OPTION_REG
STATUS, RP0
INTCON, T0IE
INTCON, GIE
INTCON, T0IF
T0_OVFL_WAIT
TMR0
INTCON
STATUS, RP0
0xC3
OPTION_REG
STATUS, RP0
INTCON, T0IE
INTCON, GIE
INTCON, T0IF
T0_OVFL_WAIT
; Clear Timer0 register
; Disable interrupts and clear T0IF
; Bank1
; PortB pull-ups are enabled,
;
;
;
;
; Bank0
; Enable TMR0 interrupt
; Enable all interrupts
Example 11-4
; Clear Timer0 register
; Disable interrupts and clear T0IF
; Bank1
; PortB pull-ups are disabled,
;
;
;
; Bank0
; Enable TMR0 interrupt
; Enable all interrupts
Interrupt on falling edge of RB0
Timer0 increment from external clock
on the high-to-low transition of T0CKI
with a prescaler of 1:256.
Interrupt on rising edge of RB0
Timer0 increment from internal clock
with a prescaler of 1:16.
Example 11-3
Section 11. Timer0
shows the initialization for the external clock
shows the initialization for the internal
DS31011A-page 11-9
11
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