PIC16F870-E/SO Microchip Technology, PIC16F870-E/SO Datasheet - Page 245
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PIC16F870-E/SO
Manufacturer Part Number
PIC16F870-E/SO
Description
28 PIN, 3.5KB ENH FLASH, 128 RAM, 22 I/O,
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F870-ISO.pdf
(172 pages)
4.PIC16F870-ISO.pdf
(6 pages)
Specifications of PIC16F870-E/SO
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB16F871 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F870-ISO PDF datasheet #3
- PIC16F870-ISO PDF datasheet #4
- Current page: 245 of 688
- Download datasheet (3Mb)
15.4.4
15.4.5
INTCON
PIR
PIE
SSPBUF
SSPADD
SSPCON
SSPSTAT
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'.
Note 1: The positions of these bits are device dependent.
1997 Microchip Technology Inc.
Name
2: These bits may also be named GPIE and GPIF.
Shaded cells are not used by SSP in I
Sleep Operation
Effect of a Reset
Synchronous Serial Port Receive Buffer/Transmit Register
Synchronous Serial Port (I
WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0
Bit 7
SMP
GIE
While in sleep mode, the I
or complete byte transfer occurs wake the processor from sleep (if the SSP interrupt is enabled).
A reset disables the SSP module and terminates the current transfer.
Table 15-3: Registers Associated with I
PEIE
Bit 6
CKE
Bit 5
T0IE
D/A
2
C mode) Address Register
Bit 4
INTE RBIE
P
SSPIE
SSPIF
2
2
C mode.
C module can receive addresses or data, and when an address match
Bit 3
S
(1)
(1)
(2)
Bit 2
T0IF
R/W
2
C Operation
Bit 1
INTF
UA
Section 15. SSP
RBIF
Bit 0
BF
(2)
0000 000x
xxxx xxxx
0000 0000
0000 0000
0000 0000
Value on
POR,
BOR
0
0
DS31015A-page 15-25
other resets
Value on all
0000 000u
uuuu uuuu
0000 0000
0000 0000
0000 0000
0
0
15
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