PIC16F913-E/ML Microchip Technology, PIC16F913-E/ML Datasheet - Page 175

• Manufacturer Part Number: PIC16F913-E/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F913-E/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SSP, I2C, AUSART, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 11-1:
TABLE 11-1:
© 2007 Microchip Technology Inc.
INTCON
LVDCON
PIE2
PIR2
Legend: x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used by the PLVD module.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3
bit 2-0
Note 1:
Name
U-0
—
2:
3:
The IRVST bit is usable only when the HFINTOSC is running.
Not tested and below minimum operating conditions.
See Section 19.0 “Electrical Specifications”.
OSFIE
OSFIF
Bit 7
GIE
—
Unimplemented: Read as ‘0’
IRVST: Internal Reference Voltage Stable Status Flag bit
1 = Indicates that the PLVD is stable and PLVD interrupt is reliable
0 = Indicates that the PLVD is not stable and PLVD interrupt must not be enabled
LVDEN: Low-Voltage Detect Module Enable bit
1 = Enables PLVD Module, powers up PLVD circuit and supporting reference circuitry
0 = Disables PLVD Module, powers down PLVD circuit and supporting reference circuitry
Unimplemented: Read as ‘0’
LVDL<2:0>: Low-Voltage Detection Level bits (nominal values)
111 = 4.5V
110 = 4.2V
101 = 4.0V
100 = 2.3V (default)
011 = 2.2V
010 = 2.1V
001 = 2.0V
000 = Reserved
REGISTERS ASSOCIATED WITH PROGRAMMABLE LOW-VOLTAGE DETECT
U-0
—
LVDCON: LOW-VOLTAGE DETECT CONTROL REGISTER
PEIE
Bit 6
C2IE
C2IF
—
(2)
W = Writable bit
‘1’ = Bit is set
IRVST
IRVST
C1IE
Bit 5
T0IE
C1IF
R-0
(1)
LVDEN
LCDIE
LCDIF
INTE
Bit 4
PIC16F913/914/916/917/946
LVDEN
R/W-0
RBIE
Bit 3
—
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
LVDL2
LVDIE
LVDIF
U-0
Bit 2
T0IF
—
(1)
LVDL1
INTF
Bit 1
—
—
LVDL2
R/W-1
(3)
CCP2IE 0000 -0-0 0000 -0-0
CCP2IF 0000 -0-0 0000 -0-0
LVDL0 --00 -100 --00 -100
RBIF
Bit 0
x = Bit is unknown
0000 000x 0000 000x
POR, BOR
LVDL1
R/W-0
Value on
DS41250F-page 173
Value on
all other
LVDL0
R/W-0
Resets
bit 0