PIC16F946T-I/PT Microchip Technology, PIC16F946T-I/PT Datasheet - Page 13

Microcontroller

PIC16F946T-I/PT

Manufacturer Part Number
PIC16F946T-I/PT
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F946T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
336 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA160011 - DAUGHTER BOARD PICDEM LCD 16F91X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F946T-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
PIC16F946T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
2.0
2.1
The PIC16F946 has a 13-bit program counter capable
of addressing an 8k x 14 program memory space
(0000h-1FFFh). The Reset vector is at 0000h and the
interrupt vector is at 0004h.
FIGURE 2-1:
© 2005 Microchip Technology Inc.
Program
Memory
On-chip
CALL, RETURN
RETFIE, RETLW
MEMORY ORGANIZATION
Program Memory Organization
Interrupt Vector
Stack Level 1
Stack Level 2
Stack Level 8
Reset Vector
PROGRAM MEMORY MAP
AND STACK FOR THE
PIC16F946
pc<12:0>
Page 0
Page 1
Page 2
Page 3
13
0000h
0004h
0005h
07FFh
0800h
0FFFh
1000h
17FFh
1800h
1FFFh
Preliminary
2.2
The data memory is partitioned into multiple banks
which contain the General Purpose Registers (GPRs)
and the Special Function Registers (SFRs). Bits RP0
and RP1 are bank select bits.
= 00:
= 01:
= 10:
= 11:
Each bank extends up to 7Fh (128 bytes). The lower
locations of each bank are reserved for the Special
Function Registers. Above the Special Function
Registers are the General Purpose Registers,
implemented as static RAM. All implemented banks
contain Special Function Registers. Some frequently
used Special Function Registers from one bank are
mirrored in another bank for code reduction and
quicker access.
2.2.1
The register file is organized as 336 x 8 in the
PIC16F946. Each register is accessed either directly or
indirectly through the File Select Register (FSR) (see
Section 2.5 “Indirect Addressing, INDF and FSR
Registers”).
2.2.2
The Special Function Registers are registers used by
the CPU and peripheral functions for controlling the
desired operation of the device (see Tables 2-1,
The special registers can be classified into two sets:
core and peripheral. The Special Function Registers
associated with the “core” are described in this section.
Those related to the operation of the peripheral
features are described in the section of that peripheral
feature.
2-2, 2-3 and 2-4). These registers are static RAM.
RP0
Data Memory Organization
RP1
Bank 0
Bank 1
Bank 2
Bank 3
GENERAL PURPOSE REGISTER
FILE
SPECIAL FUNCTION REGISTERS
(STATUS<6:5>)
PIC16F946
DS41265A-page 11

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