PIC16F946T-I/PT Microchip Technology, PIC16F946T-I/PT Datasheet - Page 70

Microcontroller

PIC16F946T-I/PT

Manufacturer Part Number
PIC16F946T-I/PT
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F946T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
336 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA160011 - DAUGHTER BOARD PICDEM LCD 16F91X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F946T-I/PT
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
PIC16F946T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC16F946
3.8
PORTG is an 8-bit port with Schmitt Trigger input
buffers. RG<5:0> are individually configured as inputs
or outputs, depending on the state of the port direction.
The port bits are also multiplexed with LCD segment
functions.
REGISTER 3-15:
REGISTER 3-16:
DS41265A-page 68
Note:
PORTG and TRISG Registers
bit 7-6
bit 5-0
bit 7-6
bit 5-0
Analog lines that carry LCD signals
(i.e., SEGx, where x are segment identifiers)
are shown as direct connections to the
device pins. The signals are outputs from
the LCD module and may be tri-stated,
depending on the configuration of the LCD
module.
PORTG – PORTG REGISTER (ADDRESS: 189h)
TRISG – PORTG TRI-STATE REGISTER (ADDRESS: 187h)
Unimplemented: Read as ‘0’
RG<5:0>: PORTG I/O Pin bits
1 = Port pin is >V
0 = Port pin is <V
Unimplemented: Read as ‘0’
TRISG<5:0>: Data Direction bits
bit 7
Legend:
R = Readable bit
- n = Value at POR
bit 7
Legend:
R = Readable bit
- n = Value at POR
U-0
U-0
U-0
U-0
IH
IL
TRISG5
R/W-x
R/W-1
RG5
Preliminary
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
TRISG4
R/W-x
R/W-1
RG4
EXAMPLE 3-7:
BCF
BCF
CLRF
BSF
BCF
MOVLW
MOVWF
CLRF
BCF
BCF
TRISG3
R/W-x
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
STATUS,RP0
STATUS,RP1
PORTG
STATUS,RP0
STATUS,RP1
0Fh
TRISF
ANSEL
STATUS,RP0
STATUS,RP1
RG3
TRISG2
R/W-x
R/W-1
RG2
INITIALIZING PORTG
;
© 2005 Microchip Technology Inc.
;Bank 3
;
;Init PORTG
;Bank 1
;
;Set RG<3:0> as inputs
;Make RG<2:0> as I/O’s
;Bank 0
;
x = Bit is unknown
x = Bit is unknown
TRISG1
R/W-x
R/W-1
RG1
TRISG0
R/W-x
R/W-1
RG0
bit 0
bit 0

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