PIC16F946T-I/PT Microchip Technology, PIC16F946T-I/PT Datasheet - Page 133

• Manufacturer Part Number: PIC16F946T-I/PT
• Description: Microcontroller
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F946T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 336 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA160011 - DAUGHTER BOARD PICDEM LCD 16F91X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

10.0
The Programmable Low-Voltage Detect module is an
interrupt driven supply level detection. The voltage
detection monitors the internal power supply.
10.1
The PIC16F946 device supports eight internal PLVD
trip points. See Register 10-1 for available PLVD trip
point voltages.
REGISTER 10-1:
© 2005 Microchip Technology Inc.
PROGRAMMABLE
LOW-VOLTAGE DETECT
(PLVD) MODULE
Voltage Trip Points
bit 7-6
bit 5
bit 4
bit 3
bit 2-0
LVDCON – LOW-VOLTAGE DETECT CONTROL REGISTER (ADDRESS: 109h)
bit 7
Unimplemented: Read as ‘0’
IRVST: Internal Reference Voltage Stable Status Flag bit
1 = Indicates that the PLVD is stable and PLVD interrupt is reliable
0 = Indicates that the PLVD is not stable and PLVD interrupt should not be enabled
LVDEN: Low-Voltage Detect Power Enable bit
1 = Enables PLVD, powers up PLVD circuit and supporting reference circuitry
0 = Disables PLVD, powers down PLVD and supporting circuitry
Unimplemented: Read as ‘0’
LVDL<2:0>: Low-Voltage Detection Limit bits (nominal values)
111 = 4.5V
110 = 4.2V
101 = 4.0V
100 = 2.3V (default)
011 = 2.2V
010 = 2.1V
001 = 2.0V
000 = 1.9V
Legend:
R = Readable bit
- n = Value at POR
Note 1: The IRVST bit is usable only when the HFINTOSC is running. When using an
U-0
—
2: Not tested and below minimum V
(2)
external crystal to run the microcontroller, the PLVD settling time is expected to be
<50 s when V
should be used after enabling the PLVD module to ensure proper status readings
of the module.
U-0
—
IRVST
R-0
DD
Preliminary
W = Writable bit
‘1’ = Bit is set
= 5V and <25 s when V
LVDEN
R/W-0
10.1.1
The PIC16F91X stores the PLVD calibration values in
fuses located in the Calibration Word 2 (2009h). The
Calibration Word 2 is not erased when using the spec-
ified bulk erase sequence in the “PIC16F91X Memory
Programming Specification” (DS41244) and thus, does
not require reprogramming.
DD
.
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
PLVD CALIBRATION
DD
(1)
= 3V. Appropriate software delays
LVDL2
R/W-1
PIC16F946
x = Bit is unknown
LVDL1
R/W-0
DS41265A-page 131
LVDL0
R/W-0
bit 0