PIC16LC923-04I/L Microchip Technology, PIC16LC923-04I/L Datasheet - Page 114
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,68PIN,PLASTIC](/photos/12/13/121323/c04-049_l_sml.jpg)
PIC16LC923-04I/L
Manufacturer Part Number
PIC16LC923-04I/L
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,68PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16C923-04L.pdf
(189 pages)
Specifications of PIC16LC923-04I/L
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
Processor Series
PIC16LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
176 B
Interface Type
I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Operating Supply Voltage
2.5 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LC923-04I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC16C9XX
FIGURE 14-14:INTERRUPT LOGIC
FIGURE 14-15:INT PIN INTERRUPT TIMING
DS30444E - page 114
INSTRUCTION FLOW
Note 1: INTF flag is sampled here (every Q1).
GIE bit
(INTCON<7>)
INTF flag
(INTCON<1>)
CLKOUT
INT pin
OSC1
Instruction
executed
Instruction
fetched
The A/D module interrupt is implemented on the PIC16C924 only.
PC
2: Interrupt latency = 3-4 T
3: CLKOUT is available only in RC oscillator mode.
4: For minimum width of INT pulse, refer to AC specs.
5: INTF can be set anytime during the Q4-Q1 cycles.
Latency is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.
ADIF
ADIE
TMR1IF
TMR1IE
3
SSPIF
SSPIE
Q1
CCP1IF
CCP1IE
TMR2IF
TMR2IE
Inst (PC-1)
Inst (PC)
1
Q2
PC
Q3
LCDIF
LCDIE
4
CY
Q4
5
where T
Q1
Inst (PC+1)
Inst (PC)
CY
Q2
1
= instruction cycle time.
PC+1
Q3
Q4
Interrupt Latency
Q1
GIE
Dummy Cycle
INTF
INTE
RBIF
RBIE
PEIF
PEIE
T0IF
T0IE
Q2
PC+1
—
Q3
Q4
2
Q1
Dummy Cycle
Inst (0004h)
Q2
0004h
Q3
1997 Microchip Technology Inc.
Wake-up (If in SLEEP mode)
Q4
Q1
Interrupt to CPU
Inst (0005h)
Q2
Inst (0004h)
0005h
Q3
Q4
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