PIC16LC923-04I/L Microchip Technology, PIC16LC923-04I/L Datasheet - Page 82
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PIC16LC923-04I/L
Manufacturer Part Number
PIC16LC923-04I/L
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,68PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16C923-04L.pdf
(189 pages)
Specifications of PIC16LC923-04I/L
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
Processor Series
PIC16LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
176 B
Interface Type
I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Operating Supply Voltage
2.5 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LC923-04I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC16C9XX
12.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 12-4. The source
impedance (R
impedance directly affect the time required to charge
the capacitor C
ance
(Figure 12-4). The source impedance affects the offset
voltage at the analog input (due to pin leakage current).
The maximum recommended impedance for ana-
log sources is 10 k . After the analog input channel is
selected (changed) this acquisition must be done
before the conversion can be started.
To
Equation 12-1 may be used. This equation calculates
the acquisition time to within 1/2 LSb error (512 steps
for the A/D). The 1/2 LSb error is the maximum error
allowed for the A/D to meet its specified accuracy.
EQUATION 12-1:
V
Given: V
The above equation reduces to:
T
Example 12-1 shows the calculation of the minimum
required acquisition time (T
based on the following system assumptions.
C
Rs = 10 k
1/2 LSb error
V
Temp (system max.) = 50 C
V
FIGURE 12-4: ANALOG INPUT MODEL
DS30444E - page 82
HOLD
C
HOLD
DD
HOLD
= -(51.2 pF)(1 k - R
= 5V
calculate
= (V
= 51.2 pF
= 0 @ t = 0
varies
HOLD
A/D Acquisition Requirements
REF
= (V
Rss = 7 k
S
- (V
HOLD
) and the internal sampling switch (R
over
REF
REF
the
Legend C
/512), for 1/2 LSb resolution
. The sampling switch (R
/512)) • (1 - e
SS
VA
A/D MINIMUM CHARGING
TIME
the
minimum
+ R
Rs
V
I leakage
R
SS
C
T
PIN
IC
HOLD
S
) ln(1/511)
device
ACQ
RAx
C
5 pF
HOLD
(-Tc/C
PIN
). This calculation is
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions
acquisition
) must be allowed
HOLD
voltage
(R
IC
+ R
SS
V
) imped-
SS
DD
(V
+ R
V
V
time,
T
DD
T
S
SS
= 0.6V
= 0.6V
))
)
),
)
I leakage
500 nA
EXAMPLE 12-1: CALCULATING THE
T
T
T
T
R
ACQ
ACQ
C
ACQ
IC
Note 1: The reference voltage (V
Note 2: The charge holding capacitor (C
Note 3: The maximum recommended impedance
Note 4: After a conversion has completed, a
=
1k
= Amplifier Settling Time +
= 5 s + Tc + [(Temp - 25 C)(0.05 s/ C)]
= 5 s + 5.747 s + [(50 C - 25 C)(0.05 s/ C)]
Holding Capacitor Charging Time +
Temperature Coefficient
-C
-51.2 pF (1 k + 7 k + 10 k ) ln(0.0020)
-51.2 pF (18 k ) ln(0.0020)
-0.921 s (-6.2364)
5.747 s
10.747 s + 1.25 s
11.997 s
V
SS R
DD
HOLD
Sampling
Switch
effect on the equation, since it cancels
itself out.
not discharged after each conversion.
for analog sources is 10 k . This is
required to meet the pin leakage specifi-
cation.
2.0 T
acquisition can begin again. During this
time the holding capacitor is not con-
nected to the selected A/D input channel.
6V
5V
4V
3V
2V
SS
(R
AD
IC
MINIMUM REQUIRED
SAMPLE TIME
Sampling Switch
5 6 7 8 9 10 11
+ R
delay must complete before
V
SS
C
= DAC capacitance
= 51.2 pF
( k )
SS
HOLD
1997 Microchip Technology Inc.
+ R
S
) ln(1/511)
REF
) has no
HOLD
) is