PIC16LF818-I/PTSL Microchip Technology, PIC16LF818-I/PTSL Datasheet - Page 84
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PIC16LF818-I/PTSL
Manufacturer Part Number
PIC16LF818-I/PTSL
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,DIP,18PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(176 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F818-ISO.pdf
(8 pages)
5.PIC16F818-ISO.pdf
(8 pages)
Specifications of PIC16LF818-I/PTSL
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16LF627A-IP PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F818-ISO PDF datasheet #4
- PIC16F818-ISO PDF datasheet #5
- Current page: 84 of 176
- Download datasheet (4Mb)
PIC16F818/819
REGISTER 11-2:
DS39598D-page 82
bit 7
bit 6
bit 5-4
bit 3-0
ADCON1: A/D CONTROL REGISTER 1 (ADDRESS 9Fh)
ADFM: A/D Result Format Select bit
1 = Right justified, 6 Most Significant bits of ADRESH are read as ‘0’
0 = Left justified, 6 Least Significant bits of ADRESL are read as ‘0’
ADCS2: A/D Clock Divide by 2 Select bit
1 = A/D clock source is divided by 2 when system clock is used
0 = Disabled
Unimplemented: Read as ‘0’
PCFG<3:0>: A/D Port Configuration Control bits
A = Analog input
C/R = Number of analog input channels/Number of A/D voltage references
bit 7
Legend:
R = Readable bit
-n = Value at POR
R/W-0
ADFM
PCFG
0000
0001
0010
0011
0100
0101
011x
1000
1001
1010
1011
1100
1101
1110
1111
AN4
ADCS2
R/W-0
A
A
A
A
D
D
D
A
A
A
A
A
D
D
D
V
V
V
V
V
V
V
V
V
AN3
REF+
REF+
REF+
REF+
REF+
REF+
REF+
REF+
REF+
A
A
A
D
A
D
U-0
—
D = Digital I/O
W = Writable bit
‘1’ = Bit is set
V
V
V
V
V
AN2
REF-
REF-
REF-
REF-
REF-
A
A
A
A
D
D
D
A
A
D
U-0
—
AN1
D
D
D
A
A
A
A
A
A
A
A
A
A
A
A
PCFG3
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
AN0
A
A
A
A
A
A
D
A
A
A
A
A
A
A
A
V
AV
AV
AV
AV
AV
AV
AN3
AN3
AN3
AN3
AN3
AN3
AN3
AN3
AN3
REF
PCFG2
R/W-0
DD
DD
DD
DD
DD
DD
2003 Microchip Technology Inc.
+
V
AV
AV
AV
AV
AV
AV
AV
AV
AV
AV
AN2
AN2
AN2
AN2
AN2
REF
x = Bit is unknown
SS
SS
SS
SS
SS
SS
SS
SS
SS
SS
PCFG1
R/W-0
-
C/R
5/0
4/1
5/0
4/1
3/0
2/1
0/0
3/2
5/0
4/1
3/2
3/2
2/2
1/0
1/2
PCFG0
R/W-0
bit 0
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