PIC17C756A-33/PT Microchip Technology, PIC17C756A-33/PT Datasheet - Page 165
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,QFP,64PIN,PLASTIC](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC17C756A-33/PT
Manufacturer Part Number
PIC17C756A-33/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,QFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C752-16L.pdf
(304 pages)
3.PIC17C752-16L.pdf
(6 pages)
Specifications of PIC17C756A-33/PT
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
33MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
902 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
64-TFQFP
Processor Series
PIC17C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
902 B
Interface Type
I2C, MSSP, RS- 232, SCI, SPI, USART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
50
Number Of Timers
8
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
12 bit
Data Rom Size
902 B
Height
1 mm
Length
10 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C756A-33/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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15.2.13
An acknowledge sequence is enabled by setting the
acknowledge
(SSPCON2<4>). When this bit is set, the SCL pin is
pulled low and the contents of the acknowledge data bit
is presented on the SDA pin. If the user wishes to gen-
erate an acknowledge, then the ACKDT bit should be
cleared. If not, the user should set the ACKDT bit
before starting an acknowledge sequence. The baud
rate generator then counts for one rollover period
(T
When the SCL pin is sampled high (clock arbitration),
the baud rate generator counts for T
is then pulled low. Following this, the ACKEN bit is
automatically cleared, the baud rate generator is turned
off and the SSP module then goes into IDLE mode
(Figure 15-29).
FIGURE 15-29:
BRG
2000 Microchip Technology Inc.
), and the SCL pin is de-asserted (pulled high).
ACKNOWLEDGE SEQUENCE
TIMING
SSPIF
Note: T
Acknowledge Sequence Starts Here,
sequence
SDA
SCL
ACKNOWLEDGE SEQUENCE WAVEFORM
Set SSPIF at the End
of Receive
BRG
= one baud rate generator period.
ACKEN = 1, ACKDT = 0
enable
Write to SSPCON2
BRG
bit,
. The SCL pin
8
D0
ACKEN
Cleared in
Software
T
BRG
ACK
15.2.13.1
If the user writes the SSPBUF when an acknowledge
sequence is in progress, then WCOL is set and the
contents of the buffer are unchanged (the write doesn’t
occur).
T
BRG
9
Set SSPIF at the End
of Acknowledge Sequence
ACKEN Automatically Cleared
WCOL Status Flag
Cleared in
Software
PIC17C7XX
DS30289B-page 165
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