PIC18F24J10T-I/SS Microchip Technology, PIC18F24J10T-I/SS Datasheet - Page 234
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PIC18F24J10T-I/SS
Manufacturer Part Number
PIC18F24J10T-I/SS
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F24J10-ISO.pdf
(368 pages)
3.PIC18F24J10-ISO.pdf
(6 pages)
4.PIC18F24J10-ISO.pdf
(6 pages)
5.PIC18F24J10-ISO.pdf
(12 pages)
Specifications of PIC18F24J10T-I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPIC, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28P
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18F24J10T-I/SSTR
- PIC16F616T-ISL PDF datasheet
- PIC18F24J10-ISO PDF datasheet #2
- PIC18F24J10-ISO PDF datasheet #3
- PIC18F24J10-ISO PDF datasheet #4
- PIC18F24J10-ISO PDF datasheet #5
- Current page: 234 of 368
- Download datasheet (6Mb)
PIC18F45J10 FAMILY
FIGURE 20-1:
20.2
The full range of voltage reference cannot be realized
due to the construction of the module. The transistors
on the top and bottom of the resistor ladder network
(Figure 20-1) keep CV
ence source rails. The voltage reference is derived
from the reference source; therefore, the CV
changes with fluctuations in that source. The tested
absolute accuracy of the voltage reference can be
found in Section 24.0 “Electrical Characteristics”.
20.3
When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the CVRCON register are not affected. To minimize
current consumption in Sleep mode, the voltage
reference should be disabled.
DS39682E-page 232
Voltage Reference Accuracy/Error
Operation During Sleep
CVRR
V
V
CVREN
V
REF
REF
DD
REF
COMPARATOR VOLTAGE REFERENCE BLOCK DIAGRAM
+
-
from approaching the refer-
CVRSS = 0
CVRSS = 1
CVRSS = 1
CVRSS = 0
16 Steps
REF
output
8R
R
R
R
R
R
R
R
clearing bit, CVREN (CVRCON<7>). This Reset also
disconnects the reference from the RA2 pin by clearing
20.4
A device Reset disables the voltage reference by
bit, CVROE (CVRCON<6>) and selects the high-voltage
range by clearing bit, CVRR (CVRCON<5>). The CVR
value select bits are also cleared.
20.5
The voltage reference module operates independently
of the comparator module. The output of the reference
generator may be connected to the RA2 pin if the
CVROE bit is set. Enabling the voltage reference out-
put onto RA2 when it is configured as a digital input will
increase current consumption. Connecting RA2 as a
digital output with CVRSS enabled will also increase
current consumption.
The RA2 pin can be used as a simple D/A output with
limited drive capability. Due to the limited current drive
capability, a buffer must be used on the voltage
reference output for external connections to V
Figure 20-2 shows an example buffering technique.
8R
Effects of a Reset
Connection Considerations
CVR<3:0>
© 2009 Microchip Technology Inc.
CV
REF
REF
.
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