PIC18F44J10-I/ML Microchip Technology, PIC18F44J10-I/ML Datasheet - Page 160

• Manufacturer Part Number: PIC18F44J10-I/ML
• Description: Microcontroller
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F44J10-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPIC, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180013 - MODULE PLUG-IN 18F45J10 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28PXLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F45J10 FAMILY
TABLE 16-2:
DS39682E-page 158
INTCON
PIR1
PIE1
IPR1
PIR3
PIE3
IPR3
TRISA
TRISC
TRISD
SSP1BUF
SSP1CON1
SSP1STAT
SSP2BUF
SSP2CON1
SSP2STAT
Legend: Shaded cells are not used by the MSSP module in SPI mode.
Note 1:
Name
(1)
These registers and/or bits are not implemented on 28-pin devices and should be read as ‘0’.
MSSP1 Receive Buffer/Transmit Register
MSSP2 Receive Buffer/Transmit Register
GIE/GIEH PEIE/GIEL TMR0IE
PSPIF
PSPIE
PSPIP
TRISC7
TRISD7
SSP2IF
SSP2IE
SSP2IP
WCOL
WCOL
Bit 7
SMP
SMP
—
REGISTERS ASSOCIATED WITH SPI OPERATION
(1)
(1)
(1)
TRISC6
TRISD6
BCL2IF
BCL2IE
BCL2IP
SSPOV
SSPOV
ADIE
ADIP
ADIF
Bit 6
CKE
CKE
—
TRISA5
TRISC5
TRISD5
SSPEN
SSPEN
RCIF
RCIE
RCIP
Bit 5
D/A
D/A
—
—
—
TRISC4
TRISD4
INT0IE
TXIE
TXIP
Bit 4
TXIF
CKP
CKP
—
—
—
—
P
P
TRISC3
TRISD3
SSP1IF
SSP1IE
SSP1IP
TRISA3
SSPM3
SSPM3
RBIE
Bit 3
—
—
—
S
S
TMR0IF
CCP1IE
CCP1IP
CCP1IF
TRISA2
TRISC2
TRISD2
SSPM2
SSPM2
Bit 2
R/W
R/W
—
—
—
TMR2IE
TMR2IP
TMR2IF
TRISC1
TRISD1
TRISA1
SSPM1
SSPM1
INT0IF
Bit 1
© 2009 Microchip Technology Inc.
UA
UA
—
—
—
TMR1IF
TMR1IE
TMR1IP
TRISA0
TRISC0
TRISD0
SSPM0
SSPM0
RBIF
Bit 0
BF
BF
—
—
—
on page
Values
Reset
47
49
49
49
49
49
49
50
50
50
48
48
48
50
50
50