PIC18F4520-E/PT Microchip Technology, PIC18F4520-E/PT Datasheet - Page 13

• Manufacturer Part Number: PIC18F4520-E/PT
• Description: 44 PIN, 32 KB ENH FLASH, 3804 RAM, 36 I/O, PB FREE,
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4520-E/PT

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

44. Module: Master Synchronous Serial Port
© 2008 Microchip Technology Inc.
Operating
(SSPM3:SSPM0 = 0110), the MSSP module of
this silicon version may not send a NACK bit (ACK)
in response to receiving the slave address loaded
in SSPADD<7:1>.
The affected addresses are in the following
ranges:
• 0x00 to 0x07
• 0x78 to 0x7F (available when using 10-bit slave
These addresses are reserved, as specified in
“I
Revision 03, 19 June 2007. Section 3.12,
“Reserved Addresses”, defines the purposes of
these addresses.
The specification is available at:
Work around
Do either of the following:
• Change the 7-bit slave address in SSPADD to
• Use Revision B silicon
Date Codes that pertain to this issue:
All engineering and production devices.
http://www.semiconductors.philips.com/i2c.
2
addressing)
an address in the range of 0x08 to 0x77.
This version of silicon removes this issue’s
addressing restrictions.
C™ Bus Specification and User Manual”,
(MSSP) – I
in
7-bit
2
C Slave
I
2
C
Slave
PIC18F2420/2520/4420/4520
mode
DS80209H-page 13