PIC18F4520-E/PT Microchip Technology, PIC18F4520-E/PT Datasheet - Page 4

44 PIN, 32 KB ENH FLASH, 3804 RAM, 36 I/O, PB FREE,

PIC18F4520-E/PT

Manufacturer Part Number
PIC18F4520-E/PT
Description
44 PIN, 32 KB ENH FLASH, 3804 RAM, 36 I/O, PB FREE,
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4520-E/PT

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F4520-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F2420/2520/4420/4520
12. Module: ECCP
13. Module: ECCP and CCP
DS80209H-page 4
The PWM pin(s) may change state if a breakpoint
is encountered during emulation and an auto-
shutdown event occurs via FLT0. This affects the
MPLAB
ICE 4000 emulators.
Work around
During emulation, use the comparator for auto-
shutdown. Applications which can tolerate a
shutdown response time of several T
the external interrupt flag, INT0IF, to detect a
shutdown event and disable the PWM by clearing
the ECCPASE bit (ECCP1AS<7>).
Date Codes that pertain to this issue:
All engineering and production devices.
When operating either Timer1 or Timer3 as a
counter with a prescale value other than 1:1 and
operating the ECCP in Compare mode with the
Special
CCP1M3:CCP1M0 = 1011), the Special Event
Trigger Reset of the timer occurs as soon as there
is
CCPR1H:CCPR1L.
This differs from the PIC18F452, where the Special
Event Trigger Reset of the timer occurs on the next
prescaler output pulse after the match between
TMRxH:TMRxL and CCPR1H:CCPR1L.
Work around
To achieve the same timer Reset period on the
PIC18F4520 family as the PIC18F452 family for a
given clock source, add 1 to the value in
CCPR1H:CCPR1L.
CCPR1H:CCPR1L = x for the PIC18F452, to
achieve
PIC18F4520 family, CCPR1H:CCPR1L = x + 1,
where the prescale is 1, 2, 4 or 8 depending on the
T1CKPS1:T1CKPS0 bit values.
Date Codes that pertain to this issue:
All engineering and production devices.
a
®
match
ICD 2 debugger and the ICE 2000 and
the
Event
same
between
Trigger
In
Reset
TMRxH:TMRxL
other
(CCP1CON
period
CY
words,
s may use
on
and
bits
the
if
14. Module: ECCP
15. Module: ECCP
When a shutdown condition occurs, the output port
is made inactive for the duration of the event. After
the event that caused the shutdown ends, the
ECCP module enables the PWM output right away
instead of waiting until the beginning of the next
PWM cycle.
Work around
Disable the auto-restart feature in software, polling
the Timer2 Interrupt Flag (TMR2IF) and wait until it
is set before clearing the ECCPASE bit.
Date Codes that pertain to this issue:
All engineering and production devices.
When switching direction in Full-Bridge PWM
mode, the modulated outputs will switch immedi-
ately instead of waiting for the next PWM cycle.
This may generate unexpected short pulses on the
modulated outputs.
Work around
Disable the PWM or set duty cycle to zero prior to
switching directions.
Date Codes that pertain to this issue:
All engineering and production devices.
© 2008 Microchip Technology Inc.

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