PIC18LF2221-I/ML Microchip Technology, PIC18LF2221-I/ML Datasheet - Page 207
![4 KB Flash, 512 RAM 28 QFN 6x6mm TUBE](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18LF2221-I/ML
Manufacturer Part Number
PIC18LF2221-I/ML
Description
4 KB Flash, 512 RAM 28 QFN 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(402 pages)
2.PIC18F2221-ISO.pdf
(8 pages)
3.PIC18F2221-ISO.pdf
(30 pages)
4.PIC18F2221-ISO.pdf
(46 pages)
5.PIC18LF2221-IML.pdf
(394 pages)
Specifications of PIC18LF2221-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF2221-I/ML
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
PIC18LF2221-I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC18F2221-ISO PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2221-ISO PDF datasheet #4
- PIC18LF2221-IML PDF datasheet #5
- Current page: 207 of 402
- Download datasheet (7Mb)
FIGURE 18-29:
FIGURE 18-30:
© 2009 Microchip Technology Inc.
SDA
SCL
SEN
S
BCLIF
SSPIF
S
BCLIF
SSPIF
SDA
SCL
SEN
BUS COLLISION DURING START CONDITION (SCL = 0)
BRG RESET DUE TO SDA ARBITRATION DURING START CONDITION
PIC18F2221/2321/4221/4321 FAMILY
SDA pulled low by other master.
Reset BRG and assert SDA.
‘0’
‘0’
SCL = 0 before BRG time-out,
bus collision occurs. Set BCLIF.
Set SEN, enable Start
sequence if SDA = 1, SCL = 1
Less than T
BRG
SDA = 0, SCL = 1
SDA = 0, SCL = 1
SDA = 0, SCL = 1,
set SSPIF
T
Set SEN, enable Start
sequence if SDA = 1, SCL = 1
BRG
S
Set S
T
BRG
T
BRG
Set SSPIF
SCL = 0 before SDA = 0,
bus collision occurs. Set BCLIF.
SCL pulled low after BRG
time-out
Interrupt cleared
in software
Interrupts cleared
in software
‘0’
‘0’
‘0’
DS39689F-page 207
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