AS5130-ASST austriamicrosystems, AS5130-ASST Datasheet - Page 8

IC ENCODER ROTORY 8-BIT 16-SSOP

AS5130-ASST

Manufacturer Part Number
AS5130-ASST
Description
IC ENCODER ROTORY 8-BIT 16-SSOP
Manufacturer
austriamicrosystems
Type
Linear, Rotary Encoder - Programmabler
Datasheet

Specifications of AS5130-ASST

Sensing Range
32mT ~ 75mT
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
24mA
Output Type
Analog, Ratiometric
Features
Programmable
Operating Temperature
-40°C ~ 125°C
Package / Case
16-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output (max)
-
Other names
AS5130-ASSTTR
AS5130
Data Sheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6.1 Timing Characteristics
T
Table 4. Timing Characteristics
6.2 Magnetic Input Range
The magnetic input range is defined by the AGC loop. This regulating loop keeps the Hall sensor output in the optimum range for low SNR by
adjusting the Hall bias current. This loop can adjust to a magnetic field strength variation of ±38%. The AGC output voltage is an indicator for the
magnetic field.
The nominal magnetic field for a balanced AGC is defined by the Hall bias and the Hall sensitivity and can be set by a variable gain in the signal
path. The gain can be set in 8 steps in the OTP or by the SSI in a mirror register. The resulting magnetic input range is a value of B
inside of a range of 32mT …75mT, if the trimming is performed by the customer.
Table 5. Magnetic Input Range
www.austriamicrosystems.com/AS5130
AMB
Symbol
Setting
t10
t
Gain A
Binary
t0
t1
t2
t3
t4
t5
t6
t7
t8
t9
TO
B
= -40 to 125ºC, unless otherwise noted.
limit
Positive edge of CLK for last command bit to
Positive edge of CLK for last command bit to
Positive edge CLK to negative edge of chip
Timeout period in 2-wire mode (from rising
Negative edge of chip select to float bus
Data valid after positive edge of CLK
Data valid after positive edge of CLK
Chip select to positive edge of CLK
Data valid to positive edge of CLK
Data valid to positive edge of CLK
Chip select to drive bus externally
Max. 75mT
000
0.9
Setup time command bit,
Hold time command bit,
0
Hold time chip select,
Setup time data bit,
Hold time data bit,
Rising CLK to CS
Bus floating time,
Bus driving time,
edge of CLK)
Parameter
Float time,
bus drive
bus float
select
1.05
001
1
010
1.2
2
Revision 1.11
011
1.4
3
Conditions
1.65
100
4
101
1.9
5
CLK/2
CLK/2
CLK/2
Min
15
15
30
30
30
+0
+0
+0
30
20
--
0
Typ
110
2.2
6
CLK/2
CLK/2
CLK/2
CLK/2
Max
+30
+30
+30
30
24
--
--
--
nominal
Min. 32mT
2.55
111
7
Units
±38%
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
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