HMC5883L-TR Honeywell Microelectronics & Precision Sensors, HMC5883L-TR Datasheet - Page 14

IC COMPASS 3 AXIS I2C 16LCC SMD

HMC5883L-TR

Manufacturer Part Number
HMC5883L-TR
Description
IC COMPASS 3 AXIS I2C 16LCC SMD
Manufacturer
Honeywell Microelectronics & Precision Sensors
Series
HMCr
Type
Compass - Three Axisr
Datasheets

Specifications of HMC5883L-TR

Sensing Range
±8G
Voltage - Supply
2.16 V ~ 3.6 V
Current - Supply
100µA
Output Type
Differential Voltage
Features
Compass - Three Axis
Operating Temperature
-30°C ~ 85°C
Package / Case
16-LCC
Measuring Range
-8G To +8G
Resolution
5 MG
Supply Voltage Range
1.71V To 3.7V, 2.16V To 3.6V
No. Of Axes
3
Sensor Case Style
LCC
Ic Interface Type
I2C
Supply Voltage Max
3.6V
No. Of Pins
16
Resoluti
5 MG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output (max)
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
342-1082-2

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HMC5883L-TR
Manufacturer:
NSC
Quantity:
1 043
Part Number:
HMC5883L-TR
Manufacturer:
HONEYWELL
Quantity:
20 000
HMC5883L
Data Output X Registers A and B
The data output X registers are two 8-bit registers, data output register A and data output register B. These registers
store the measurement result from channel X. Data output X register A contains the MSB from the measurement result,
and data output X register B contains the LSB from the measurement result. The value stored in these two registers is a
16-bit value in 2’s complement form, whose range is 0xF800 to 0x07FF. DXRA0 through DXRA7 and DXRB0 through
DXRB7 indicate bit locations, with DXRA and DXRB denoting the bits that are in the data output X registers. DXRA7 and
DXRB7 denote the first bit of the data stream. The number in parenthesis indicates the default value of that bit.
In the event the ADC reading overflows or underflows for the given channel, or if there is a math overflow during the bias
measurement, this data register will contain the value -4096. This register value will clear when after the next valid
measurement is made.
Data Output Y Registers A and B
The data output Y registers are two 8-bit registers, data output register A and data output register B. These registers
store the measurement result from channel Y. Data output Y register A contains the MSB from the measurement result,
and data output Y register B contains the LSB from the measurement result. The value stored in these two registers is a
16-bit value in 2’s complement form, whose range is 0xF800 to 0x07FF. DYRA0 through DYRA7 and DYRB0 through
DYRB7 indicate bit locations, with DYRA and DYRB denoting the bits that are in the data output Y registers. DYRA7 and
DYRB7 denote the first bit of the data stream. The number in parenthesis indicates the default value of that bit.
In the event the ADC reading overflows or underflows for the given channel, or if there is a math overflow during the bias
measurement, this data register will contain the value -4096. This register value will clear when after the next valid
measurement is made.
Data Output Z Registers A and B
The data output Z registers are two 8-bit registers, data output register A and data output register B. These registers
store the measurement result from channel Z. Data output Z register A contains the MSB from the measurement result,
and data output Z register B contains the LSB from the measurement result. The value stored in these two registers is a
16-bit value in 2’s complement form, whose range is 0xF800 to 0x07FF. DZRA0 through DZRA7 and DZRB0 through
DZRB7 indicate bit locations, with DZRA and DZRB denoting the bits that are in the data output Z registers. DZRA7 and
DZRB7 denote the first bit of the data stream. The number in parenthesis indicates the default value of that bit.
In the event the ADC reading overflows or underflows for the given channel, or if there is a math overflow during the bias
measurement, this data register will contain the value -4096. This register value will clear when after the next valid
measurement is made.
14
DXRA7
(0)
DXRB7
(0)
DYRA7
(0)
DYRB7
(0)
DXRA6
(0)
DXRB6
(0)
DYRA6
(0)
DYRB6
(0)
Table 13: Data Output X Registers A and B
Table 14: Data Output Y Registers A and B
DXRA5
(0)
DXRB5
DYRA5
(0)
DYRB5
(0)
(0)
DXRA4
(0)
DXRB4
(0)
DYRA4
(0)
DYRB4
(0)
DXRA3
(0)
DXRB3
(0)
DYRA3
(0)
DYRB3
(0)
DXRA2
(0)
DXRB2
(0)
DYRA2
(0)
DYRB2
(0)
DXRA1
(0)
DXRB1
(0)
DYRA1
(0)
DYRB1
(0)
DXRA0
(0)
DXRB0
(0)
DYRA0
(0)
DYRB0
(0)
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