AT88SA100S-TH-T Atmel, AT88SA100S-TH-T Datasheet - Page 10

IC BATTERY AUTHENTICATION 8TSSOP

AT88SA100S-TH-T

Manufacturer Part Number
AT88SA100S-TH-T
Description
IC BATTERY AUTHENTICATION 8TSSOP
Manufacturer
Atmel
Series
CryptoAuthentication™r
Datasheet

Specifications of AT88SA100S-TH-T

Function
Battery Authentication
Voltage - Supply
2.7 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP (0.173", 4.40mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.1.2. Transmit Flag
4.1.3. Sleep Flag
4.1.4. Pause State
10
The Transmit flag is used to turn around the signal so that the Atmel
system, depending on its current state. The bytes that the AT88SA100S returns to the system, depending on its
current state as follows:
Table 4-3.
The AT88SA100S always transmits complete blocks to the system, so in the above table the status/error bytes
result in 4-bytes going to the system – count, error, CRC x 2.
After receipt of a command block, the AT88SA100S will parse the command for errors, a process which takes
t
an error then the AT88SA100S will respond with an error code. If there is no error then the AT88SA100S
internally transitions automatically from t
are complete.
The sleep flag is used to transition the AT88SA100S to the low power state, which causes a complete reset of the
AT88SA100S’ internal command engine and input/output buffer. It can be sent to the AT88SA100S at any time
when the AT88SA100S will accept a flag.
To achieve the specified I
asleep. To achieve I
0.5V of V
The pause state is entered via the PauseLong command and can be exited only when the watchdog timer has
expired and the chip transitions to a sleep state. When in the pause state, the chip ignores all transitions on the
signal pin but does not enter a low power consumption mode.
The pause state provides a mechanism for multiple AT88SA100S chips on the same wire to be selected and to
exchange data with the host microprocessor. The PauseLong command includes an optional address field which
is compared to the values in Fuses 84-87. If the two match, then the chip enters the pause state, otherwise it
continues to monitor the bus for subsequent commands. The host would selectively put all but one AT88SA100S
in the pause state before executing the MAC command on the active chip. After the end of the watchdog interval
all the chips will have entered the sleep state and the selection process can be started with a Wake token (which
will then be honored by all chips) and selection of a subsequent chip.
Atmel AT88SA100S
PARSE
State Description
After Wake, but prior to first
command
After successful command
execution
Execution error
After CRC or other parsing
error
(Refer to 4.1.1). After this interval the system can send a Transmit token to the AT88SA100S – if there was
CC
to avoid additional leakage on the input circuit of the chip.
Return Codes
SLEEP
if the sleep state of the input pin is high, the voltage on the input signal should be within
SLEEP
Error/Status
Atmel recommends that the input signal be brought below V
0xFF
0x11
0x0F
PARSE
Description
Indication that a proper Wake token has been received by the Atmel
AT88SA100S
Return bytes per “Output Parameters” in Command section of this
document. In some cases this is a single byte with a value of 0x00 indicating
success. The Transmit flag can be resent to the Atmel AT88SA100S
repeatedly if a re-read of the output is necessary.
Command was properly received but could not be executed by the Atmel
AT88SA100S chip. Changes in the Atmel AT88SA100S chip state or the
value of the command bits must happen before it is re-attempted.
Command was NOT properly received by Atmel AT88SA100S and should
be re-issued by the system.
to t
EXEC
and will not respond to any Transmit tokens until both delays
®
AT88SA100S can send data back to the
IL
when the chip is
8558E–SMEM–8/10

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