AT88SA100S-TH-T Atmel, AT88SA100S-TH-T Datasheet - Page 11

• Manufacturer Part Number: AT88SA100S-TH-T
• Description: IC BATTERY AUTHENTICATION 8TSSOP
• Manufacturer: Atmel
• Series: CryptoAuthentication™r

Specifications of AT88SA100S-TH-T

• Function: Battery Authentication
• Voltage - Supply: 2.7 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP (0.173", 4.40mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.2.
4.3.
4.4.
8558E–SMEM–8/10
IO Blocks
Commands are sent to the chip, and responses received from the chip, within a block that is constructed in the
following way:
IO Flow
The general IO flow for a MAC command is as follows:
1. System sends Wake token
2. System sends Transmit Flag
3. Receive 0x11 value from the Atmel AT88SA100S to verify proper wakeup synchronization
4. System sends Command Flag
5. System sends command block
6. System waits t
7. System sends Transmit Flag. If command format is OK, the Atmel AT88SA100S ignores this flag because the
8. System waits t
9. System sends Transmit Flag
10. Receive output block from the Atmel AT88SA100S, system checks CRC
11. If CRC from the Atmel AT88SA100S is incorrect, indication transmission error, system resends Transmit flag
12. System sends sleep flag to the Atmel AT88SA100S
All commands other than MAC have a short execution delay. In these cases the system should omit steps six,
seven and eight and replace this with a wait of duration t
Synchronization
Because the communications protocol is half duplex, there is the possibility that the system and the AT88SA100S
will fall out of synchronization with each other. In order to speed recovery, the AT88SA100S implements a timeout
that forces the AT88SA100S to sleep. See Section 4.4.1.
Byte
Number
0
1 to (N-2) Packet
N-1, N
computation engine is busy. If there was an error, the Atmel AT88SA100S responds with an error code
Name
Count
Checksum
PARSE
EXEC
. Refer to
for the Atmel AT88SA100S to check for command formation errors
Meaning
Number of bytes to be transferred to the chip in the block, including count, packet and checksum,
so this byte should always have a value of (N+1). The maximum size block is 39 and the
minimum size block is four. Values outside this range will cause unpredictable operation.
Command, parameters and data, or response
See Section 5 for more details
CRC-16 verification of the count and packet bytes. The CRC polynomial is 0x8005, the initial
register value should be zero and after the last bit of the count and packet have been transmitted
the internal CRC register should have a value that matches that in the block. The first byte
transmitted (N-1) is the least significant byte of the CRC value so the last byte of the block is the
most significant byte of the CRC.
4.1.1
PARSE
+ t
EXEC
.
Atmel AT88SA100S
11