ADNS-6000 Avago Technologies US Inc., ADNS-6000 Datasheet - Page 38

Laser Mouse Sensor

ADNS-6000

Manufacturer Part Number
ADNS-6000
Description
Laser Mouse Sensor
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of ADNS-6000

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ADNS-6000
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Shutter_Max_Bound_Lower
Access: Read/Write
Shutter_Max_Bound_Upper
Access: Read/Write
Data Type: 16-bit unsigned integer.
USAGE: This value sets the maximum allowable shutter value when operating in automatic mode. Units are clock cycles.
Since the automatic frame rate function is based on shutter value, the value in these registers can limit the range of the
frame rate control. To read from the registers, read Upper first followed by Lower. To write to the registers, write Lower
first, followed by Upper, then execute a write to the Frame_Period_Max_Bound_Upper and Lower registers. To set the
shutter manually, disable the AGC via the Extended_Config register and write the desired value to these registers.
Reading this register will return the most recent value that was written to it. However, the value will take effect only
after a write to the Frame_Period_Max_Bound_Upper and Lower registers. After writing to Frame_Period_Max_Bound_
Upper, wait at least two frame times before writing to Shutter_Max_Bound_Upper or Lower again. The “Busy” bit in the
Extended_Config register may be used in lieu of a timer to determine when it is safe to write. See the Extended_Config
register for more details.
In addition, the three bound registers must also follow this rule when set to non-default values:
Frame_Period_Max_Bound ≥ Frame_Period_Min_Bound + Shutter_Max_Bound.
SROM_ID
Access: Read
Data Type:8-Bit unsigned integer.
USAGE: Contains the revision of the downloaded Shadow ROM firmware. If the firmware has been successfully down-
loaded and the chip is operating out of SROM, this register will contain the SROM firmware revision, otherwise it will
contain 0x00.
Note: The IC hardware revision is available by reading the Revision_ID register (register 0x01).
38
Field
Field
Field
Bit
Bit
Bit
SB
SR
SB
7
7
7
15
7
7
SB
SR
SB
6
6
6
14
6
6
Address: 0x1D
Default Value: 0x20
Address: 0x1E
Default Value: 0x4E
Address: 0x1F
Default Value: Version dependent
SB
SR
SB
5
5
5
13
5
5
SB
SR
SB
4
4
4
12
4
4
SB
SR
SB
3
3
3
11
3
3
SB
SR
SB
2
2
2
10
2
2
SB
SR
SB
1
1
1
9
1
1
SB
SB
SR
0
0
0
0
8
0

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