DK-START-4CGX15N/P Altera, DK-START-4CGX15N/P Datasheet - Page 29

• Manufacturer Part Number: DK-START-4CGX15N/P
• Description: Cyclone IV Tranceiver Development Kit
• Manufacturer: Altera

Specifications of DK-START-4CGX15N/P

• Silicon Manufacturer: Altera
• Features: System Controller Enabling Passive Serial, Flash/SRAM Memory Devices, PCI Express Edge Connector
• Kit Contents: Board, Cables, PSU, CD
• Core Architecture: FPGA
• Core Sub-architecture: Cyclone
• Silicon Core Number: EP4C
• Silicon Family Name: Cyclone IV GX
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 2: Board Components
Components and Transceiver Interfaces
10/100/1000 Ethernet
Figure 2–6. SGMII Interface between FPGA (MAC) and Marvell 88E1111 PHY
Table 2–25. Ethernet PHY Pin Assignments, Signal Names and Functions
Table 2–26. Ethernet PHY Component Reference and Manufacturing Information
© March 2010 Altera Corporation
Board Reference
Reference
Board
U9
U9.82
U9.81
U9.77
U9.75
U9.25
U9.24
U9.23
U9.28
Ethernet PHY BASE-T device
SGMII TX data
SGMII TX data
SGMII RX data
SGMII RX data
Management bus control
Management bus data
Management bus interrupt
Device reset
10/100/1000 Mbps
A Marvell 88E1111 PHY device is used for 10/100/1000 BASE-T Ethernet connection.
The device is an auto-negotiating Ethernet PHY with an SGMII interface to the FPGA.
The MAC function must be provided in the FPGA for typical networking applications
such the Altera Triple Speed Ethernet MegaCore design. The Marvell 88E1111 PHY
uses 2.5-V and 1.2-V power rails and requires a 25-MHz reference clock driven from a
dedicated oscillator. The device interfaces to a Halo Electronics HFJ11-1G02E model
RJ45 with internal magnetics that can be used for driving copper lines with Ethernet
traffic.
By default, the GXB_RX1 and GXB_TX1 channels of the FPGA are connected to the
Ethernet PHY as shown in
Figure 2–6
PHY.
Table 2–25
Table 2–26
information.
Description
Ethernet MAC
Description
shows the SGMII interface between the FPGA (MAC) and Marvell 88E1111
lists the Ethernet PHY interface pin assignments.
lists the Ethernet PHY interface component reference and manufacturing
SGMII Interface
Marvell Semiconductor
Manufacturer
Table 2–27 on page
Marvell 88E1111
Schematic Signal Name
ENET_TX_P
ENET_TX_N
ENET_RX_P
ENET_RX_N
ENET_MDC
ENET_MDIO
ENET_INTn
ENET_RESETn
Device
PHY
Cyclone IV GX Transceiver Starter Board Reference Manual
88E1111-B2-CAAIC000
2–22.
Manufacturing
Part Number
I/O Standard
1.4-V PCML
RJ45
2.5-V
www.marvell.com
Manufacturer
Cyclone IV GX
Pin Number
Website
Device
F12
C2
C1
N9
K8
K9
E2
E1
2–21