IPR-ASI Altera, IPR-ASI Datasheet - Page 7

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IPR-ASI

Manufacturer Part Number
IPR-ASI
Description
IP CORE Renewal Of IP-ASI
Manufacturer
Altera
Type
MegaCorer
Datasheet

Specifications of IPR-ASI

Software Application
IP CORE, Interface And Protocols, AUDIO AND VIDEO
Supported Families
Arria GX, Cyclone, HardCopy, Stratix, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Mfg Application Notes
ASI Demo Video Interface App Note
Function
Receiver/Transmitter for Digital Video Broadcast
License
Renewal License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
Chapter 1: About This MegaCore Function
MegaCore Verification
MegaCore Verification
Resource Utilization
January 2011 Altera Corporation
f
For information on ASI MegaCore function demonstration on the Altera Cyclone
Video Demonstration Board, refer to the
The ASI MegaCore verification involves the testing of the DVB-ASI specification
EN 50083-9 from CENELEC / December 2002 “Cable networks for television signals, sound
signals and interactive services. Part 9: Interfaces for CATV/SMATV head-ends and similar
professional equipment for DVB/MPEG2 transport streams”.
Table 1–3
Quartus II software version 10.0.
Table 1–3. Resource Usage
Arria GX
Cyclone
Cyclone II
Cyclone III
Cyclone III LS
Cyclone IV GX
Stratix
Stratix GX
Stratix II
Stratix II GX
Stratix III
Stratix IV
Device Family
shows estimated resource usage for the ASI MegaCore function, with the
Receiver
Transmitter
Receiver
Transmitter
Receiver
Transmitter
Receiver
Transmitter
Receiver
Transmitter
Receiver
Transmitter
Receiver
Transmitter
Receiver
Transmitter
Receiver
Transmitter
Receiver
Transmitter
Receiver
Transmitter
Receiver
Transmitter
Parameters
Asynchronous Serial Interface (ASI) MegaCore Function User Guide
Cyclone Video Demonstration Board Data
LEs
573
576
577
587
564
577
506
78
78
78
78
78
78
98
Combinational
ALUTs
314
323
314
321
328
70
47
70
47
65
Registers
Logic
191
243
191
241
191
49
64
49
62
64
Sheet.
1–3

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