CDB42438 Cirrus Logic Inc, CDB42438 Datasheet - Page 43

• Manufacturer Part Number: CDB42438
• Description: Eval Bd 108dB 6&8ch Multi-Chnl CODECs
• Manufacturer: Cirrus Logic Inc

Specifications of CDB42438

• Main Purpose: Audio, CODEC
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: CS42438
• Primary Attributes: 6 Single-Ended and 2 Differential Analog Inputs and 8 Outputs, S/PDIF Transmitter and Receiver
• Secondary Attributes: Graphic User Interface
• Description/function: Audio CODECs
• Operating Supply Voltage: 5 V to 12 V
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: CS42438
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant
• Other names: 598-1500

DS646F2
7.4
7.4.1
7.5
7.5.1
7.5.2
Reserved
FREEZE
7
7
Functional Mode (Address 03h)
MISCELLANEOUS CONTROL (Address 04h)
MCLK Frequency (MFREQ[2:0])
Default = 000
Function:
Sets the appropriate frequency for the supplied MCLK. For TDM operation, SCLK must equal 256Fs.
MCLK can be equal to or greater than SCLK.
Freeze Controls (FREEZE)
Default = 0
Function:
This function will freeze the previous settings of, and allow modifications to be made to the channel mutes,
the DAC and ADC Volume Control/Channel Invert registers without the changes taking effect until the
FREEZE is disabled. To have multiple changes in these control port registers take effect simultaneously,
enable the FREEZE bit, make all register changes, then disable the FREEZE bit.
Auxiliary Digital Interface Format (AUX_DIF)
Default = 0
0 - Left Justified
1 - I²S
Function:
This bit selects the digital interface format used for the AUX Serial Port. The required relationship between
the Left/Right clock, serial clock and serial data is defined by the Digital Interface Format and the options
are detailed in
MFreq2
0
0
0
0
1
Reserved
AUX_DIF
6
6
MFreq1
Figures
0
0
1
1
X
Reserved
Reserved
17-18.
5
5
MFreq0
X
0
1
0
1
Table 7. MCLK Frequency Settings
Reserved
Reserved
1.0290 MHz to 12.8000 MHz
1.5360 MHz to 19.2000 MHz
2.0480 MHz to 25.6000 MHz
3.0720 MHz to 38.4000 MHz
4.0960 MHz to 51.2000 MHz
4
4
Description
Reserved
MFreq2
3
3
Reserved
MFreq1
2
2
SSM
1024
256
384
512
768
Reserved
MFreq0
Ratio (xFs)
1
1
DSM
N/A
N/A
256
384
512
CS42438
Reserved
Reserved
QSM
N/A
N/A
N/A
N/A
256
0
0
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