CDB42L52 Cirrus Logic Inc, CDB42L52 Datasheet - Page 22

• Manufacturer Part Number: CDB42L52
• Description: Eval Bd LP Codec W/Class D Spkr Driver
• Manufacturer: Cirrus Logic Inc

Specifications of CDB42L52

• Main Purpose: Audio, CODEC
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: CS42L52
• Primary Attributes: 4 Stereo Audio Inputs, Stereo Line and Speaker Outputs, S/PDIF Inputs and Outputs
• Secondary Attributes: GUI, I2C, SPI, USB Interfaces
• Description/function: Audio CODECs
• Operating Supply Voltage: 5 V
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: CS42L52
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 598-1505

22
SWITCHING SPECIFICATIONS - I²C CONTROL PORT
Inputs: Logic 0 = DGND, Logic 1 = VL, SDA C
SCL Clock Frequency
RESET
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup time to SCL Rising
Rise Time of SCL and SDA
Fall Time SCL and SDA
Setup Time for Stop Condition
Acknowledge Delay from SCL Falling
16. Data must be held for sufficient time to bridge the transition time, t
Rising Edge to Start
RST
SDA
SCL
Stop
t irs
t buf
Parameters
Start
t hdst
t
low
Figure 4. Control Port Timing - I²C
L
t
= 30 pF.
hdd
t high
(Note 16)
5/13/08
t sud
Symbol
t
t
t
t
t
t
Repeated
t
susp
t
t
f
hdst
high
sust
t
hdd
sud
low
t
t
ack
buf
scl
t sust
irs
rc
fc
Start
t
hdst
fc
, of SCL.
Min
550
250
300
4.7
4.0
4.7
4.0
4.7
4.7
t r
0
-
-
-
t f
Max
1000
100
300
1
-
-
-
-
-
-
-
-
-
Stop
t susp
CS42L52
DS680F1
Unit
kHz
ns
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
ns