CDB42L55 Cirrus Logic Inc, CDB42L55 Datasheet - Page 19

Eval Bd Ultra Low Power Stereo Codec

CDB42L55

Manufacturer Part Number
CDB42L55
Description
Eval Bd Ultra Low Power Stereo Codec
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB42L55

Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42L55
Primary Attributes
2 Stereo Analog Inputs, Stereo Line and Headphone Outputs, S/PDIF Transmitter and Receiver
Secondary Attributes
GUI, USB, RS232, I2C Interfaces, USB or External or Battery Power Supply
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
598-1506
CDB-42L55
DS773DB1
6 PERFORMANCE PLOTS
Test conditions (unless otherwise specified): T
997 Hz sine wave; dB values relative to full-scale output; measurement bandwidth 20 Hz to 20 kHz (un-weighted);
sample frequency = 48 kHz; +2 dB analog gain for Line Output path; -4 dB analog gain for Headphone Output path;
headphone test load: R
B
S
d
F
d
B
F
S
Figure 10. THD+N vs Freq. - Analog In to Digital Out
Figure 12. FFT - Analog In to Digital Out @ -1 dBFS
Note:
-100
-120
-140
-100
-20
-40
-60
-80
+0
-60
-65
-70
-75
-80
-85
-90
-95
20
20
50
The total harmonic distortion + noise (THD+N) performance of the ADC in the CS42L55 is determined
by the value of the capacitor on the FILT+ pin. Larger capacitor values yield significant improvement
in THD+N at low frequencies.
2.2 µF capacitor.
50
100
100
200
200
L
= 16 Ω; no LPF option for Headphone Output path.
500
500
Hz
Hz
1k
1k
2k
2k
5k
5k
Fig. 10
10k
10k
A
= 25°C; VA=VCP=VLDO=VL=1.8 V; input test signal is a full-scale
20k
20k
shows the THD+N vs. frequency performance measured with a
Figure 11. THD+N vs Amplitude - Analog In to Digital Out
B
S
d
F
B
S
d
F
Figure 13.
-100
-100
-120
-140
-60
-65
-70
-75
-80
-85
-90
-95
-20
-40
-60
-80
+0
-60
20
50
FFT - Analog In to Digital Out @ -60 dBFS
-50
100
-40
200
500
dBr
-30
Hz
1k
-20
2k
CDB42L55
5k
-10
10k
20k
19

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