CDB5461AU Cirrus Logic Inc, CDB5461AU Datasheet - Page 31

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CDB5461AU

Manufacturer Part Number
CDB5461AU
Description
Eval Bd Sngl Phase Power/Energy
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB5461AU

Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
CS5461A
Primary Attributes
1-Phase, Energy-to-Frequency Output
Secondary Attributes
GUI, USB, SPI, Microwire Interfaces
Processor To Be Evaluated
CS5461A, C8051F320
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant, Contains lead / RoHS non-compliant
Other names
598-1552
6.15 Pulsewidth Register ( PW )
6.16 E3 Pulse Width Register ( PulseWidth )
6.17 Voltage Sag Duration Register ( VSAG
6.18 Voltage Sag Level Register ( VSAG
Address: 24
DS661F2
MSB
MSB
MSB
MSB
2
0
0
0
23
Default = 0x000000
function of number of sample periods. The default corresponds to a pulsewidth of
512 samples/[(MCLK/K)/1024] = 128 msec with MCLK = 4.096 MHz and K = 1. The value is represented in un-
signed notation.
Address: 22
Default = 0x000000 = Hardware-generated pulse width (up to 125 µs)
Address: 23
Address: 21
Default = 0x000200 = 512 sample periods
PW sets the pulsewidth of E1 and E2 pulses in Alternate Pulse and Mechanical Counter format. The width is a
The PulseWidth register sets the pulse width of E3 pulses in units of 1/OWR.
E3 pulse width =
The range of this register is from 1 to 8388607.
Voltage Sag Duration (VSAG
termine a voltage level sag event (VSAG
value is represented in unsigned notation.
Default = 0x000000
Voltage Sag Level (VSAG
sag duration, must fall below in order to register a sag condition. This value is represented in unsigned notation
and in the range of 0 ≤ VSAG
2
2
2
2
22
22
22
-1
2
2
2
2
21
21
21
-2
-------------------------------------------- -
(
(
2
2
2
MCLK
2
20
20
20
-3
PulseWidth
)
Level
2
2
K
2
2
19
19
19
)
-4
Duration
) defines the voltage level that the magnitude of input samples, averaged over the
Level
1024
2
2
2
2
< 1.0, with the binary point to the right of the MSB.
18
18
18
-5
) defines the number of instantaneous voltage measurements utilized to de-
LEVEL
2
2
2
2
17
17
17
-6
Level
). Setting this register to zero will disable Voltage Sag-detect. The
Duration
2
2
2
2
16
16
16
-7
)
.....
.....
.....
.....
)
2
2
2
2
-17
6
6
6
2
2
2
2
-18
5
5
5
2
2
2
2
-19
4
4
4
2
2
2
2
-20
3
3
3
2
2
2
2
-21
2
2
2
CS5461A
2
2
2
2
-22
1
1
1
LSB
LSB
LSB
LSB
2
2
2
2
-23
0
0
0
31

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