IP4252CZ12-6-TTL NXP Semiconductors, IP4252CZ12-6-TTL Datasheet - Page 10
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IP4252CZ12-6-TTL
Manufacturer Part Number
IP4252CZ12-6-TTL
Description
Manufacturer
NXP Semiconductors
Datasheet
1.IP4252CZ12-6-TTL.pdf
(18 pages)
Specifications of IP4252CZ12-6-TTL
Operating Temperature Min Deg. C
-40C
Operating Temperature Max Deg. C
85C
Rad Hardened
No
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
IP4251_52_53_54-TTL
Objective data sheet
The capacitance values specified for the signal channels of the MMC interface differ from
the SDHC specification. The MMC card-side interface is specified to have an intrinsic
capacitance of 12 pF to 18 pF and the total channel is limited according to the
specification to 30 pF only. Therefore, any filter device capacitance is limited to a
maximum of up to 18 pF, including the card holder and PCB traces.
Please refer to
MMC interface application.
Fig 7.
DAT3/CD pull-up
10 kΩ − 100 kΩ
electrical card detect
INTERFACE
DAT3/CD pull-up
to HOST
optional:
depends on
Example of IP4252 in an SDHC card interface
exact value
logic levels
>270 kΩ
required
Figure 8
All information provided in this document is subject to legal disclaimers.
DAT1
DAT0
CLK
CMD
DAT3/CD
DAT2
CD
WP
Rev. 1 — 31 January 2011
for a general example of the implementation of the IP4252 in an
V
Integrated 4-, 6- and 8-channel passive filter network
CC
of IP4252CZ16-8-TTL
2-additional channels
(V
SD
optional:
)
(IP4252CZ16-8-TTL)
pull-up resistors
10 kΩ − 100 kΩ
IP4252CZ12-6-TTL
write protect switch
IP4251/52/53/54-TTL
optional:
WP
card detect switch
optional:
CD
V
DAT3/CD
CC
DAT1
DAT0
DAT2
(V
CMD
GND
CLK
SD
)
© NXP B.V. 2011. All rights reserved.
SD MEMORY
SET_CLR_
CARD_DETECT
(ACMD42)
10 kΩ − 90 kΩ
CARD
018aaa075
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