P0071 Terasic Technologies Inc, P0071 Datasheet
P0071
Specifications of P0071
Related parts for P0071
P0071 Summary of contents
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Chapter 1 Introduction of the tPad ................................................................ 2 1.1 About the Kit .............................................................................................................................................. 6 1.2 Getting Help ............................................................................................................................................... 7 Chapter 2 tPad Architecture ............................................................................ 8 2.1 Layout and Components ............................................................................................................................. 8 2.2 Block Diagram of the tPad ......................................................................................................................... 9 Chapter ...
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The tPad Embedded Evaluation Kit is a comprehensive design environment with everything embedded developers need to create processing-based systems. The tPad delivers an integrated platform that includes hardware, design tools, intellectual property (IP) and reference designs for developing embedded software ...
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The key features of the board are listed below: DE2-115 Development Board Cyclone IV EP4CE115 FPGA o 114,480 LEs o 432 M9K memory blocks o 3,888 Kbits embedded memory o 4 PLLs Configuration o On-board USB-Blaster circuitry ...
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Audio o 24-bit encoder/decoder (CODEC) o Line-in, line-out, and microphone-in jacks Display o 16x2 LCD module On-Board Clocking Circuitry o Three 50MHz oscillator clock inputs o SMA connectors (external clock input/output) SD Card Socket o Provides ...
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Power o Desktop DC input o Switching and step-down regulators LM3150MH LCD touch screen module Equipped with an 8-inch Amorphous-TFT-LCD (Thin Film Transistor Liquid Crystal Display) module Module composed of LED backlight Support 18-bit parallel ...
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Table 1-2 Key performance parameters of the CMOS sensor Parameter Active Pixels Pixel size Color filter array Shutter type Maximum data rate/master clock Frame rate ADC resolution Responsivity Pixel dynamic range SNRMAX Supply Voltage ...
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Here is information of how to get help if you encounter any ...
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This chapter describes the architecture of the tPad including block diagram and components ...
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Figure 2-2 tPad PCB and component diagram (bottom view Figure 2-3 gives ...
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This section describes the detailed information of the components, connectors, and pin assignments of the tPad ...
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Figure 3-2 The JTAG chain configuration header Configuring the FPGA in JTAG Mode Figure 3-3 illustrates the JTAG configuration setup. To download a configuration bit stream into the Cyclone IV E FPGA, perform the following steps: Ensure that ...
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Figure 3-3 The JTAG chain configuration scheme Figure 3-4 The RUN/PROG switch (SW19) is set to JTAG mode Configuring the EPCS64 in AS Mode Figure 3-5 illustrates the AS configuration set up. To download a configuration bit stream into ...
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The tPad comes with a bus controller using the Max ...
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” ” The tPad features an 8-inch Amorphous-TFT-LCD panel. The LCD Touch Screen module offers resolution ...
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LCD_R2 PIN_R28 LCD_R3 PIN_U27 LCD_R4 PIN_U28 LCD_R5 PIN_V27 LCD_G0 PIN_P21 LCD_G1 PIN_R21 LCD_G2 PIN_R22 LCD_G3 PIN_R23 LCD_G4 PIN_T21 LCD_G5 PIN_T22 LCD_B0 PIN_V28 LCD_B1 PIN_U22 LCD_B2 PIN_V22 LCD_B3 PIN_V25 LCD_B4 PIN_L28 LCD_B5 PIN_J26 LCD _DEN PIN_P25 TOUCH _PENIRQ_N PIN_L22 TOUCH _DOUT ...
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CAMERA_ D3 PIN_G26 CAMERA_ D4 PIN_H25 CAMERA_ D5 PIN_H26 CAMERA_ D6 PIN_K25 CAMERA_ D7 PIN_K26 CAMERA_ D8 PIN_L23 CAMERA_ D9 PIN_L24 CAMERA_ D10 PIN_M25 CAMERA_ D11 PIN_M26 CAMERA_ STROBE PIN_G28 CAMERA_ LVAL PIN_K27 CAMERA_ FVAL PIN_K28 CAMERA_ RESET_N PIN_M28 CAMERA_ ...
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This chapter gives detailed description of the provided bundles of exclusive demonstrations implemented on tPad. These demonstrations are particularly designed (or ported) for tPad, with the goal of showing the potential capabilities of the kit and showcase the unique benefits ...
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Note: Please insert the supplied SD Card from this demonstration The tPad ...
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Figure 4-2 Block diagram of the tPad Starter demonstration Figure 4-3 illustrates the software structure of this demonstration. The touch panel‟s SPI HAL block responds to the bottom hardware requests and interface to upper layers. The SGDMA HAL allocates required ...
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Demonstration Source Code Project directory: tPad_Starter Bit stream used: tPad_Starter.sof Nios II Workspace: tPad_Starter\Software Demonstration Batch File Demo Batch File Folder:tPad_Starter\demo_batch The demo batch file includes the following files: Batch File: tPad_Starter.bat, tPad_Starter_bashrc ...
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Figure 4-4 Main interface of the tPad Starter demonstration Figure 4-5 The tPad Starter Touch sub item 21 ...
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This demonstration shows a simple picture viewer implementation using Nios II based ...
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Figure 4-7 Block diagram of the picture viewer demonstration Demonstration Source Code Project directory: tPad_Picture_Viewer Bit stream used: tPad_Picture_Viewer.sof Nios II Workspace: tPad_Picture_Viewer\Software Demonstration Batch File Demo Batch File Folder: tPad_Picture_Viewer\demo_batch The demo batch file ...
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Run the Nios II Software under the workspace tPad_Picture_Viewer\Software (Note*) Touch the play button will proceed to display the next image. the tPad picture viewer demonstration. demonstration Figure 4-8 tPad picture viewer demonstration Table 4-1 Touch panel displayed ...
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The Video and Image Processing (VIP) Example Design demonstrates dynamic scaling and clipping of ...
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A video source is input through an analog composite port on tPad which generates a digital output in ITU BT656 format. A number of common video functions are performed on this input stream in the FPGA. These functions include clipping, ...
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Demonstration Source Code Project directory: tPad_VIP Bit stream used: tPad_VIP.sof Nios II Workspace: tPad_VIP\Software Demonstration Batch File Demo Batch File Folder: tPad_VIP\demo_batch The demo batch file includes the following files: Batch File: tPad_VIP.bat, tPad_VIP_bashrc ...
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Figure 4-10 The VIP demonstration running result Figure 4-11 Setup for the tPad_VIP demonstration ...
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As soon as the configuration code is downloaded into the FPGA, the I2C Sensor Configuration block will initial the CMOS sensor via I2C interface. The CMOS sensor is configured as follow: Row and Column Size: 800 * 600 ...
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Demonstration Source Code Project directory: tPad_Camera Bit stream used: tPad_Camera.sof Demonstration Batch File Demo Batch File Folder: tPad_Camera\demo_batch The demo batch file includes the following files: Batch File: tPad_Camera.bat FPGA Configure File: tPad_Camera.sof ...
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Table 4-3 The functional keys of the digital camera demonstration Component Function Description KEY[0] KEY[1] KEY[2] KEY[3] SW[0] HEX[7:0] Figure 4-13 Screen shot of the tPad camera demonstration ...
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These functions allow you to fully integrate common video functions with video interfaces, processors, and external memory controllers. The example design uses an Altera Cyclone® EP4CE115F29 featured tPad board. A video source is input through the CMOS sensor ...
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Figure 4-14 VIP Camera Example SOPC Block Diagram (Key Components) Demonstration Source Code Project directory: tPad_VIP_Camera Bit stream used: tPad_VIP_Camera.sof Nios II Workspace: tPad_VIP_Camera \Software Demonstration Batch File Demo Batch File Folder: tPad_VIP_Camera\demo_batch The demo ...
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Batch File: tPad_VIP_Camera.bat, tPad_VIP_Camera _bashrc FPGA Configure File: tPad_VIP_Camera.sof Nios II Program: tPad_VIP_Camera.elf Demonstration Setup Connect the VGA output of the tPad board to a VGA monitor (both LCD and CRT type of monitors should ...
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Figure 4-15 Setup for the tPad_VIP_Camera demonstration This demonstration shows ...
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Figure 4-16 Block diagram of the digital accelerometer demonstration Demonstration Source Code Project directory: tPad_G_sensor Bit stream used: G_sensor.sof Nios II Workspace: tPad_G_sensor\Software Demonstration Batch File Demo Batch File Folder: tPad_G_sensor\demo_batch The demo batch file ...
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Figure 4-17 shows the result for running the demonstration Figure 4-17 tPad Digital Accelerometer demonstration Note: Execute tPad_G_sensor \demo_batch\G_sensor.bat will download .sof and .elf files. 37 ...
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The application selector utility is the default code that powers on the FPGA and offers a graphical interface on LCD allowing users to select and run different demonstrations resides on SD Card ...
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Connect power to the tPad board Insert the SD Card ...
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FAT file system long file name rules. Spaces are permitted. CFI Flash CFI flash is used to store the software binary files of applications. All software binary files used ...
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Convert .flash file into .binary file nios2-elf-objcopy –I srec –O binary “your example_HW.flash” “your example_HW.bin” From the command shell navigate to where your ELF file is located and create your software ...
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This section describes some details about the operation of restoring ...
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Restoring the original binary file To restore the original contents of the Application Selector, perform the following steps: Copy tPad_Selector project into a local directory of your choice. The tPad_Selector project is placed in tPad_Demonstrations\tPad_Selector Power on the ...
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Version V1.0 V1.0.1 V1.0.2 ...