LCMXO2280C-L-EV Lattice, LCMXO2280C-L-EV Datasheet - Page 44
LCMXO2280C-L-EV
Manufacturer Part Number
LCMXO2280C-L-EV
Description
MCU, MPU & DSP Development Tools MachXO 2280C Eval Br d - Standard
Manufacturer
Lattice
Datasheet
1.LCMXO640C-3TN100C.pdf
(95 pages)
Specifications of LCMXO2280C-L-EV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 44 of 95
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Lattice Semiconductor
Switching Test Conditions
Figure 3-5 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,
voltage, and other test conditions are shown in Figure 3-5.
Figure 3-5. Output Test Load, LVTTL and LVCMOS Standards
Table 3-5. Test Fixture Required Components, Non-Terminated Interfaces
LVTTL and LVCMOS settings (L -> H, H -> L)
LVTTL and LVCMOS 3.3 (Z -> H)
LVTTL and LVCMOS 3.3 (Z -> L)
Other LVCMOS (Z -> H)
Other LVCMOS (Z -> L)
LVTTL + LVCMOS (H -> Z)
LVTTL + LVCMOS (L -> Z)
Note: Output test conditions for all other interfaces are determined by the respective standards.
Test Condition
DUT
V
R1
T
3-18
188
R
∞
1
CL
0pF
0pF
C
L
Test Poi nt
DC and Switching Characteristics
LVTTL, LVCMOS 3.3 = 1.5V
LVCMOS 2.5 = V
LVCMOS 1.8 = V
LVCMOS 1.5 = V
LVCMOS 1.2 = V
1.5
V
V
V
V
OH
OL
CCIO
CCIO
- 0.15
- 0.15
/2
/2
MachXO Family Data Sheet
Timing Ref.
CCIO
CCIO
CCIO
CCIO
/2
/2
/2
/2
V
V
V
V
V
V
V
—
—
—
—
—
OH
OH
OH
OL
OL
OL
T
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