AD12401-326JWS Analog Devices Inc, AD12401-326JWS Datasheet - Page 9

• Manufacturer Part Number: AD12401-326JWS
• Description: IC,A/D CONVERTER,DUAL,12-BIT,MODULE
• Manufacturer: Analog Devices Inc

Specifications of AD12401-326JWS

• Number Of Bits: 12
• Sampling Rate (per Second): 326M
• Data Interface: Parallel
• Number Of Converters: 2
• Power Dissipation (max): 6.8W
• Voltage Supply Source: Analog and Digital
• Operating Temperature: 0°C ~ 60°C
• Package / Case: Module
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 7. Output Coding (Twos Complement)
Code
4095
.
.
.
2048
2047
.
.
0
KWS
+1.6
.
.
.
0
−0.000781 to
.
.
−1.6 to
DATA OUT A
DATA OUT B
400MHZ
A
DR_EN
NOTES
1. DATA LOST DUE TO ASSERTION OF DR_EN. LATENCY OF 74 ENCODE CLOCK CYCLES BEFORE DATA VALID.
2. IF A SINGLE-ENDED SINE WAVE IS USED FOR ENCODE, USE THE ZERO CROSSING POINT (AC-COUPLED) AS
3. THE DR_EN PIN IS USED TO SYNCHRONIZE THE COLLECTION OF DATA INTO EXTERNAL BUFFER MEMORIES.
IN
DRA
DRA
DRB
DRB
ENC
THE 50% POINT AND APPLY THE SAME TIMING INFORMATION.
THE DR_EN PIN CAN BE APPLIED SYNCHRONOUSLY OR ASYNCHRONOUSLY TO THE AD12401. IF APPLIED
ASYNCHRONOUSLY, DR_EN MUST BE HELD LOW FOR A MINIMUM OF 5ns TO ENSURE CORRECT OPERATION.
THE FUNCTION SHUTS OFF DRA AND DRB UNTIL THE DR_EN PIN IS SET HIGH AGAIN. DRA AND DRB RESUME
ON THE NEXT VALID DRA AFTER DR_EN IS RETURNED HIGH. IF THIS FEATURE IS NOT REQUIRED, TIE THIS
PIN TO 3.3V THROUGH A 3.74kΩ RESISTOR OR LEAVE IT FLOATING.
(V)
JWS
+0.8
.
.
.
0
+0.0003905
.
.
+0.8
DATA OUT
t
EH
t
ENC
ENC
EL
DR
DR
N – 1
N
N + 1
N – 74
1/f
Digital Output
0111 1111 1111
.
.
.
0000 0000 0000
1111 1111 1111
.
.
1000 0000 0000
74 CLOCK CYCLES
S
N + 2
N + 3
Figure 4. Highlighted Timing Diagram
N – 73
t
PD
Figure 3. Timing Diagram
Rev. A | Page 9 of 28
t
EDR
N
Table 8. Option Pin List with Necessary Associated Circuitry
Pin
Name
RESET
DR_EN
N + 1
N + 2
t
VD
Active
High
Low
High
N + 3
ENCODE
ENCODE
N + 4
Figure 2. ENCODE Equivalent Circuit
N + 5
1
Logic
Level
Type
LVTTL
LVTTL
1
N + 6
3.3V
N + 7
100Ω
100Ω
Default
Level
High
High
N + 8
3.3V
100Ω
100Ω
DRIVER
Associated Circuitry
Within Part
3.74 kΩ Pull-Up
Weak Pull-Up (>16 kΩ)
PECL
AD12401