AD7890AN-2 Analog Devices Inc, AD7890AN-2 Datasheet - Page 10

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AD7890AN-2

Manufacturer Part Number
AD7890AN-2
Description
IC,Data Acquisition System,8-CHANNEL,12-BIT,DIP,24PIN,PLASTIC
Manufacturer
Analog Devices Inc
Type
Data Acquisition System (DAS)r
Datasheet

Specifications of AD7890AN-2

Rohs Status
RoHS non-compliant
Resolution (bits)
12 b
Sampling Rate (per Second)
117k
Data Interface
Serial
Voltage Supply Source
Single Supply
Voltage - Supply
0 V ~ 2.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
24-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
AD7890
CONTROL REGISTER
The control register for the AD7890 contains 5 bits of information.
Six serial clock pulses must be provided to the part in order to
write data to the control register (seven if the write is required
to put the part in standby mode). If TFS returns high before six
serial clock cycles, then no data transfer takes place to the
control register and the write cycle has to be restarted to write
the data to the control register.
MSB
A2
Table 3.
Bit Name
A2
A1
A0
CONV
STBY
Description
Address Input. This input is the most significant address input for multiplexer channel selection.
Address Input. This is the 2nd most significant address input for multiplexer channel selection.
Address Input. Least significant address input for multiplexer channel selection. When the address is written to the control
register, an internal pulse is initiated, the pulse width of which is determined by the value of capacitance on the C
this pulse is active, it ensures the conversion process cannot be activated. This allows for the multiplexer settling time,
track/hold acquisition time before the track/hold goes into hold, and the conversion is initiated. In applications where there is
an antialiasing filter between the MUX OUT pin and the SHA IN pin , the filter settling time can be taken into account before the
input on the SHA IN pin is sampled. When the internal pulse times out, the track/hold goes into hold and conversion is initiated.
Conversion Start. Writing a 1 to this bit initiates a conversion in a similar manner to the CONVST input. Continuous conversion
starts do not take place when there is a 1 in this location. The internal pulse and the conversion process are initiated after the
sixth serial clock cycle of the write operation if a 1 is written to this bit. With a 1 in this bit, the hardware conversion start (the
CONVST input) is disabled. Writing a 0 to this bit enables the hardware CONVST input.
Standby Mode Input. Writing a 1 to this bit places the device in its standby, or power-down, mode. Writing a 0 to this bit places
the device in its normal operating mode. The part does not enter its standby mode until the seventh falling edge of SCLK in a
write operation. Therefore, the part requires seven serial clock pulses in its serial write operation if it is required to put the part
into standby.
A1
A0
Rev. C | Page 10 of 28
If, however, the CONV bit of the register is set to a Logic 1, then
a conversion is initiated whenever a control register write takes
place regardless of how many serial clock cycles the TFS
remains low for. The default (power-on) condition of all bits in
the control register is 0.
CONV
LSB
STBY
EXT
pin. When

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