AD7983BCPZ-RL Analog Devices Inc, AD7983BCPZ-RL Datasheet - Page 16

IC,A/D CONVERTER,SINGLE,16-BIT,LLCC,10PIN

AD7983BCPZ-RL

Manufacturer Part Number
AD7983BCPZ-RL
Description
IC,A/D CONVERTER,SINGLE,16-BIT,LLCC,10PIN
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheet

Specifications of AD7983BCPZ-RL

Number Of Bits
16
Sampling Rate (per Second)
1.33M
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
12mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
10-WFDFN, CSP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
AD7983BCPZ-RL7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD7983
DIGITAL INTERFACE
Though the AD7983 has a reduced number of pins, it offers
flexibility in its serial interface modes.
When in CS mode, the AD7983 is compatible with SPI, QSPI,
and digital hosts. This interface can use either a 3-wire or a 4-wire
interface. A 3-wire interface using the CNV, SCK, and SDO
signals minimizes wiring connections useful, for instance, in
isolated applications. A 4-wire interface using the SDI, CNV,
SCK, and SDO signals allows CNV, which initiates the conversions,
to be independent of the readback timing (SDI). This is useful
in low jitter sampling or simultaneous sampling applications.
The AD7983, when in chain mode, provides a daisy-chain
feature using the SDI input for cascading multiple ADCs on a
single data line similar to a shift register.
Rev. A | Page 16 of 24
The mode in which the part operates depends on the SDI level
when the CNV rising edge occurs. The CS mode is selected if
SDI is high, and the chain mode is selected if SDI is low. The
SDI hold time is such that when SDI and CNV are connected,
the chain mode is always selected.
In either mode, the AD7983 offers the flexibility to optionally
force a start bit in front of the data bits. This start bit can be
used as a busy signal indicator to interrupt the digital host and
trigger the data reading. Otherwise, without a busy indicator,
the user must time out the maximum conversion time prior to
readback.
The busy indicator feature is enabled
• In CS mode if CNV or SDI is low when the ADC conversion
• In chain mode if SCK is high during the CNV rising edge
ends (see
(see Figure 37).
Figure 29
and
Figure 33
).

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