AD9248BCPZRL-65 Analog Devices Inc, AD9248BCPZRL-65 Datasheet - Page 21
![IC,A/D CONVERTER,DUAL,14-BIT,CMOS,LLCC,64PIN](/photos/6/50/65021/505-64-lfcsp_sml.jpg)
AD9248BCPZRL-65
Manufacturer Part Number
AD9248BCPZRL-65
Description
IC,A/D CONVERTER,DUAL,14-BIT,CMOS,LLCC,64PIN
Manufacturer
Analog Devices Inc
Datasheet
1.AD9248BSTZ-20.pdf
(48 pages)
Specifications of AD9248BCPZRL-65
Number Of Bits
14
Sampling Rate (per Second)
65M
Data Interface
Parallel
Number Of Converters
2
Power Dissipation (max)
600mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9248BST-65EBZ - BOARD EVAL WITH AD9248BST-65AD9248BCP-65EBZ - BOARD EVAL WITH AD9248BCP-65
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
External Reference Operation
The use of an external reference may be necessary to
enhance the gain accuracy of the ADC or to improve thermal
drift characteristics. When multiple ADCs track one another, a
single reference (internal or external) may be necessary to
reduce gain matching errors to an acceptable level. A high
precision external reference may also be selected to provide
lower gain and offset temperature drift. Figure 37 shows the
typical drift characteristics of the internal reference in both
1 V and 0.5 V modes. When the SENSE pin is tied to AVDD,
the internal reference is disabled, allowing the use of an
external reference. An internal reference buffer loads the
external reference with an equivalent 7 kΩ load. The internal
buffer still generates the positive and negative full-scale
references, REFT and REFB, for the ADC core. The input span
is always twice the value of the reference voltage; therefore, the
external reference must be limited to a maximum of 1 V. If the
internal reference of the AD9248 is used to drive multiple
converters to improve gain matching, the loading of the
reference by the other converters must be considered. Figure 38
depicts how the internal reference voltage is affected by loading.
10μF
10μF
SENSE
Figure 36. Programmable Reference Configuration
VIN+
VIN–
VREF
R2
R1
SELECT
LOGIC
AD9248
CORE
0.5V
ADC
REFT
REFB
0.1μF
0.1μF
0.1μF
10μF
Rev. B | Page 21 of 48
–0.10
–0.05
–0.15
–0.20
–0.25
0.05
1.2
1.0
0.8
0.6
0.4
0.2
–40 –30 –20 –10
0
0
0
0.5
Figure 38. VREF Accuracy vs. Load
Figure 37. Typical VREF Drift
0
1.0
TEMPERATURE (°C)
10
1V ERROR
LOAD (mA)
20
1.5
30
40
0.5V ERROR
2.0
50
VREF = 0.5V
VREF = 1V
60
2.5
70
AD9248
80
3.0