AD9516-2BCPZ-REEL7 Analog Devices Inc, AD9516-2BCPZ-REEL7 Datasheet - Page 8

• Manufacturer Part Number: AD9516-2BCPZ-REEL7
• Description: IC,Ten Distributed-Output Clock Driver,LLCC,64PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Clock Generator, Fanout Distributionr

Specifications of AD9516-2BCPZ-REEL7

• Pll: Yes
• Input: Clock
• Output: CMOS, LVDS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 1:14
• Differential - Input:output: Yes/Yes
• Frequency - Max: 2.33GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Frequency-max: 2.33GHz
• Function: Clock Generator
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: LFCSP EP
• Pin Count: 64
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9516-2/PCBZ - BOARD EVAL FOR AD9516-2 2.2GHZ
• Lead Free Status / Rohs Status: Compliant

AD9516-2
CLOCK OUTPUT ADDITIVE PHASE NOISE (DISTRIBUTION ONLY; VCO DIVIDER NOT USED)
Table 6.
Parameter
CLK-TO-LVPECL ADDITIVE PHASE NOISE
CLK-TO-LVDS ADDITIVE PHASE NOISE
CLK-TO-CMOS ADDITIVE PHASE NOISE
CLK = 1 GHz, Output = 1 GHz
CLK = 1 GHz, Output = 200 MHz
CLK = 1.6 GHz, Output = 800 MHz
CLK = 1.6 GHz, Output = 400 MHz
CLK = 1 GHz, Output = 250 MHz
Divider = 1
Divider = 5
Divider = 2
Divider = 4
Divider = 4
At 10 Hz Offset
At 100 Hz Offset
At 1 kHz Offset
At 10 kHz Offset
At 100 kHz Offset
At 1 MHz Offset
At 10 MHz Offset
At 100 MHz Offset
At 10 Hz Offset
At 100 Hz Offset
At 1 kHz Offset
At 10 kHz Offset
At 100 kHz Offset
At 1 MHz Offset
>10 MHz Offset
At 10 Hz Offset
At 100 Hz Offset
At 1 kHz Offset
At 10 kHz Offset
At 100 kHz Offset
At 1 MHz Offset
At 10 MHz Offset
At 100 MHz Offset
At 10 Hz Offset
At 100 Hz Offset
At 1 kHz Offset
At 10 kHz Offset
At 100 kHz Offset
At 1 MHz Offset
>10 MHz Offset
At 10 Hz Offset
At 100 Hz Offset
At 1 kHz Offset
At 10 kHz Offset
At 100 kHz Offset
At 1 MHz Offset
>10 MHz Offset
Min
Typ
−109
−118
−130
−139
−144
−146
−147
−149
−120
−126
−139
−150
−155
−157
−157
−103
−110
−120
−127
−133
−138
−147
−149
−114
−122
−132
−140
−146
−150
−155
−110
−120
−127
−136
−144
−147
−154
Rev. A | Page 8 of 80
Max
Unit
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Test Conditions/Comments
Distribution section only; does not include PLL and VCO
Input slew rate > 1 V/ns
Input slew rate > 1 V/ns
Distribution section only; does not include PLL and VCO
Input slew rate > 1 V/ns
Input slew rate > 1 V/ns
Distribution section only; does not
include PLL and VCO
Input slew rate > 1 V/ns