AD9516-5BCPZ Analog Devices Inc, AD9516-5BCPZ Datasheet - Page 61

• Manufacturer Part Number: AD9516-5BCPZ
• Description: 10/14 Chan Clock IC W/PLL-no VCO
• Manufacturer: Analog Devices Inc
• Type: Clock Generator, Fanout Distributionr

Specifications of AD9516-5BCPZ

• Pll: Yes
• Input: CMOS, LVDS, LVPECL
• Output: CMOS, LVDS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 1:14
• Differential - Input:output: Yes/Yes
• Frequency - Max: 2.4GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Frequency-max: 2.4GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Reg.
Addr
(Hex) Bit(s) Name
01D
01F
01F
01F
01F
01F
01F
Reg.
Addr
(Hex) Bit(s) Name
0A0
0A1
Table 50. Fine Delay Adjust: OUT6 to OUT9
[0]
[5]
[4]
[3]
[2]
[1]
[0]
[0]
[5:3] OUT6 ramp
Holdover
enable
Holdover
active
REF2
selected
CLK
frequency >
threshold
REF2
frequency >
threshold
REF1
frequency >
threshold
Digital lock
detect
OUT6 delay
bypass
capacitors
Along with 0x01D[2] enables the holdover function.
[0] = 1; holdover enabled.
Readback register: indicates if the part is in the holdover state (see Figure 40). This is not the same as
holdover enabled.
[5] = 0; not in holdover.
[5] = 1; holdover state active.
Readback register: indicates which PLL reference is selected as the input to the PLL.
[4] = 0; REF1 selected (or differential reference if in differential mode).
[4] = 1; REF2 selected.
Readback register: indicates if the CLK frequency is greater than the threshold (see Table 13, REF1, REF2, and
CLK frequency status monitor).
[3] = 0; CLK frequency is less than the threshold.
[3] = 1; CLK frequency is greater than the threshold.
Readback register: indicates if the frequency of the signal at REF2 is greater than the threshold frequency
set by Register 0x01A[6].
[2] = 0; REF2 frequency is less than threshold frequency.
[2] = 1; REF2 frequency is greater than threshold frequency.
Readback register: indicates if the frequency of the signal at REF2 is greater than the threshold frequency
set by Register 0x01A[6].
[1] = 0; REF1 frequency is less than threshold frequency.
[1] = 1; REF1 frequency is greater than threshold frequency.
Readback register: digital lock detect.
[0] = 0; PLL is not locked.
[0] = 1; PLL is locked.
Description
[0] = 0; holdover disabled (default).
Description
Bypass or use the delay function.
[0] = 0; use delay function.
[0] = 1; bypass delay function (default).
Selects the number of ramp capacitors used by the delay function. The combination of the number of
capacitors and the ramp current sets the full-scale delay.
[5] [4] [3] Number of Capacitors
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
4 (default)
3
3
2
3
2
2
1
Rev. 0 | Page 61 of 76
AD9516-5