AD9518-1BCPZ-REEL7 Analog Devices Inc, AD9518-1BCPZ-REEL7 Datasheet - Page 43
![IC,Six Distributed-Output Clock Driver,LLCC,48PIN,PLASTIC](/photos/6/50/65022/cp-48-8_sml.jpg)
AD9518-1BCPZ-REEL7
Manufacturer Part Number
AD9518-1BCPZ-REEL7
Description
IC,Six Distributed-Output Clock Driver,LLCC,48PIN,PLASTIC
Manufacturer
Analog Devices Inc
Type
Clock Generator, Fanout Distributionr
Datasheet
1.AD9518-1ABCPZ-RL7.pdf
(64 pages)
Specifications of AD9518-1BCPZ-REEL7
Pll
Yes
Input
CMOS, LVDS, LVPECL
Output
LVPECL
Number Of Circuits
1
Ratio - Input:output
1:6
Differential - Input:output
Yes/Yes
Frequency - Max
2.65GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LFCSP
Frequency-max
2.65GHz
Function
Clock Generator
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
LFCSP EP
Pin Count
48
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9518-1/PCBZ - BOARD EVAL FOR AD9518-1
Lead Free Status / Rohs Status
Compliant
Table 40. Serial Control Port Timing
Parameter
t
t
t
t
t
t
t
t
DS
DH
CLK
S
C
HIGH
LOW
DV
SCLK
SDIO
CS
Description
Setup time between data and rising edge of SCLK
Hold time between data and rising edge of SCLK
Period of the clock
Setup time between CS falling edge and SCLK rising edge (start of communication cycle)
Setup time between SCLK rising edge and CS rising edge (end of communication cycle)
Minimum period that SCLK should be in a logic high state
Minimum period that SCLK should be in a logic low state
SCLK to valid SDIO and SDO (see Figure 48)
t
t
DS
S
BIT N
t
HIGH
t
DH
Figure 50. Serial Control Port Timing—Write
t
CLK
Rev. A | Page 43 of 64
t
LOW
BIT N + 1
t
C
AD9518-1