AD9520-5BCPZ-REEL7 Analog Devices Inc, AD9520-5BCPZ-REEL7 Datasheet - Page 4
![12/24-Output Clock Generator](/photos/6/50/65021/505-64-lfcsp_sml.jpg)
AD9520-5BCPZ-REEL7
Manufacturer Part Number
AD9520-5BCPZ-REEL7
Description
12/24-Output Clock Generator
Manufacturer
Analog Devices Inc
Type
Clock Generator, Fanout Distributionr
Datasheet
1.AD9520-5BCPZ.pdf
(80 pages)
Specifications of AD9520-5BCPZ-REEL7
Design Resources
Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121) Phase Coherent FSK Modulator (CN0186)
Pll
Yes
Input
CMOS, LVDS, LVPECL
Output
CMOS, LVPECL
Number Of Circuits
1
Ratio - Input:output
2:12, 2:24
Differential - Input:output
Yes/Yes
Frequency - Max
2.4GHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Frequency-max
1.6GHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9520-5
SPECIFICATIONS
Typical (typ) is given for VS = VS_DRV = 3.3 V ± 5%; VS ≤ VCP ≤ 5.25 V; T
noted. Minimum (min) and maximum (max) values are given over full VS and T
POWER SUPPLY REQUIREMENTS
Table 1.
Parameter
VS
VS_DRV
VCP
RSET Pin Resistor
CPRSET Pin Resistor
PLL CHARACTERISTICS
Table 2.
Parameter
REFERENCE INPUTS
PHASE/FREQUENCY DETECTOR (PFD)
PFD Input Frequency
Reference Input Clock Doubler Frequency
Antibacklash Pulse Width
Differential Mode (REFIN, REFIN)
Dual Single-Ended Mode (REF1, REF2)
Crystal Oscillator
Input Frequency
Input Sensitivity
Self-Bias Voltage, REFIN
Self-Bias Voltage, REFIN
Input Resistance, REFIN
Input Resistance, REFIN
Input Frequency (AC-Coupled)
Input Frequency (AC-Coupled
Input Frequency (DC-Coupled)
Input Sensitivity (AC-Coupled
Input Sensitivity (AC-Coupled
Input Logic High, DC Offset Off
Input Logic Low, DC Offset Off
Input Current
Input Capacitance
Maximum Crystal Motional Resistance
Crystal Resonator Frequency Range
with DC Offset Off )
with DC Offset On)
with DC Offset Off )
with DC Offset On)
Min
3.135
2.375
VS
Typ
3.3
4.12
5.1
Max
3.465
VS
5.25
Min
0
1.34
1.30
4.0
4.4
10
0
0.55
1.5
2.0
−100
16.67
0.004
Unit
V
V
V
kΩ
kΩ
Typ
280
1.60
1.50
4.8
5.3
2
1.3
2.9
6.0
Test Conditions/Comments
3.3 V ± 5%
This is nominally 2.5 V to 3.3 V ± 5%
This is nominally 3.3 V to 5.0 V ± 5%
Sets internal biasing currents; connect to ground
Sets internal CP current range, nominally 4.8 mA (CP_lsb = 600 μA);
actual current can be calculated by CP_lsb = 3.06/CPRSET; connect to ground
Rev. 0 | Page 4 of 80
Max
250
1.75
1.60
5.9
6.4
250
250
250
3.28
2.78
0.8
+100
33.33
30
100
45
50
Unit
MHz
mV p-p
V
V
kΩ
kΩ
MHz
MHz
MHz
V p-p
V p-p
V
V
μA
pF
MHz
Ω
MHz
MHz
MHz
ns
ns
ns
A
= 25°C; RSET = 4.12 kΩ; CPRSET = 5.1 kΩ, unless otherwise
A
(−40°C to +85°C) variation.
Test Conditions/Comments
Differential mode (can accommodate single-ended
input by ac grounding undriven input)
Frequencies below about 1 MHz should be dc-coupled;
be careful to match V
Self-bias voltage of REFIN
Self-bias voltage of REFIN
Self-biased
Self-biased
Two single-ended CMOS-compatible inputs
Slew rate must be > 50 V/μs
Slew rate must be > 50 V/μs, and input amplitude
sensitivity specification must be met; see input sensitivity
Slew rate > 50 V/μs; CMOS levels
VIH should not exceed VS
VIH should not exceed VS
Each pin, REFIN (REF1)/REFIN (REF2)
Antibacklash pulse width = 1.3 ns, 2.9 ns
Antibacklash pulse width = 6.0 ns
Antibacklash pulse width = 1.3 ns, 2.9 ns
0x017[1:0] = 01b
0x017[1:0] = 00b; 0x017[1:0] = 11b
0x017[1:0] = 10b
1
1
CM
(self-bias voltage)
1
1