ADC0808S250/DB NXP Semiconductors, ADC0808S250/DB Datasheet - Page 15

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ADC0808S250/DB

Manufacturer Part Number
ADC0808S250/DB
Description
ADC0808S250 Demo Board
Manufacturer
NXP Semiconductors
Series
-r
Datasheets

Specifications of ADC0808S250/DB

Design Resources
ADC0808S Demo Brd PCB Files
Number Of Adc's
1
Number Of Bits
8
Sampling Rate (per Second)
250M
Data Interface
Parallel
Input Range
2 Vpp
Power (typ) @ Conditions
-
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC0808S250
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
NXP Semiconductors
ADC0808S125_ADC0808S250_3
Product data sheet
12.2.4 Signal-to-Noise ratio (S/N)
12.2.5 Spurious Free Dynamic Range (SFDR)
12.2.6 InterModulation Distortion (IMD)
The value of k is usually 6 (THD is calculated based on the first 5 harmonics).
S/N is the ratio of the output signal power to the noise power, excluding the harmonics and
the DC component:
The SFDR value specifies the available signal range as the spectral distance between the
amplitude of the fundamental (a
non-harmonic (max (s)), excluding the DC component:
The second-order and third-order intermodulation distortion products IMD2 and IMD3 are
defined using a dual tone input sinusoid, where f
coherence criterion.
IMD is the ratio of the RMS value of either tone to the RMS value of the worst, second or
third-order intermodulation products.
P
SFDR dB
S N
P
Fig 11. Spectrum of dual tone input sine wave of frequencies f
signal
harmonics
=
=
10log
a
2
1
=
=
f
10
a
1
20log
2
2
+
f
P
--------------- -
P
2
signal
a
2f
noise
2
3
2
10
+
Rev. 03 — 24 February 2009
f
f
1
2
----------------- -
max s
a
+
2f
f
1
1
1
a
2
k
f
2
1
) and the amplitude of the largest spurious harmonic and
2f
f
1
2
+ f
2f
2
1
f
1
+ 2f
Single 8-bit ADC, up to 125 MHz or 250 MHz
3f
2
2
2f
3f
1
1
1
+ f
and f
ADC0808S125/250
2
2
are chosen according to the
1
and f
frequency
2
© NXP B.V. 2009. All rights reserved.
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