ADF7025BCPZ-RL7 Analog Devices Inc, ADF7025BCPZ-RL7 Datasheet - Page 17

IC,RF Modulator/Demodulator,LLCC,48PIN,PLASTIC

ADF7025BCPZ-RL7

Manufacturer Part Number
ADF7025BCPZ-RL7
Description
IC,RF Modulator/Demodulator,LLCC,48PIN,PLASTIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADF7025BCPZ-RL7

Frequency
431MHz ~ 464MHz, 862MHz ~ 870MHz and 902MHz ~ 928MHz
Data Rate - Maximum
384kbps
Modulation Or Protocol
FSK
Applications
Keyless Entery, Home Automation, Wireless Audio/Video
Power - Output
-20dBm ~ 13dBm
Sensitivity
-104dBm
Voltage - Supply
2.3 V ~ 3.6 V
Current - Receiving
19mA
Current - Transmitting
28mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LFCSP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Modulation Type
FSK
Product Depth (mm)
7mm
Product Length (mm)
7mm
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADF70XXEKZ1 - KIT DEV ADF702X FOR BF533EZKITEVAL-ADF7025DBZ1 - BOARD EVAL ADF7025 902-928MHZ
Memory Size
-
Lead Free Status / Rohs Status
Compliant
VCO Bias Current
VCO bias current can be adjusted using Bit R1_DB19 to
Bit R1_DB16. To ensure VCO oscillation under all conditions,
the minimum bias current setting is Setting 12 (0xC).
431 MHz to 464 MHz Operation
For operation in the 431 MHz to 464 MHz band, the frequency
divide-by-2 has to be enabled. It is enabled by R1_DB13. Because
this divide is external to the synthesizer loop, the feedback
divider number (N + F) should be programmed to a value twice
the desired RF output frequency.
LOOP FILTER
R1_DB (16:19)
VCO BIAS
CVCO PIN
220µF
VCO
Figure 24. Voltage Controlled Oscillator
÷2
VCO SELECT BIT
÷2
MUX
TO PA AND
N DIVIDER
Rev. A | Page 17 of 44
CHOOSING CHANNELS FOR BEST SYSTEM
PERFORMANCE
The Fractional-N PLL allows the selection of any channel
within 862 MHz to 928 MHz (and 431 MHz to 464 MHz using
divide-by-2) to a resolution of <300 Hz. This also facilitates
frequency-hopping systems.
Careful selection of the RF transmit channels must be made to
achieve best spurious performance. The architecture of
Fractional-N results in some level of the nearest integer channel
moving through the loop to the RF output. These beat-note
spurs are not attenuated by the loop, if the desired RF channel
and the nearest integer channel are separated by a frequency of
less than the LBW.
The occurrence of beat-note spurs is rare, because the integer
frequencies are at multiples of the reference, which is typically
>10 MHz.
Beat-note spurs can be significantly reduced in amplitude by
avoiding very small or very large values in the fractional
register, using the frequency doubler. By having a channel
1 MHz away from an integer frequency, a 100 kHz loop filter
can reduce the level to less than −45 dBc.
ADF7025

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