ADSP-2191MKCAZ-160 Analog Devices Inc, ADSP-2191MKCAZ-160 Datasheet - Page 39

• Manufacturer Part Number: ADSP-2191MKCAZ-160
• Description: 16-bit,160 MIPS, 2.5V,160K Bytes RAM
• Manufacturer: Analog Devices Inc
• Series: ADSP-21xxr
• Type: Fixed Pointr

Specifications of ADSP-2191MKCAZ-160

• Interface: Host Interface, SPI, SSP, UART
• Clock Rate: 160MHz
• Non-volatile Memory: External
• On-chip Ram: 160kB
• Voltage - I/o: 3.00V, 3.30V
• Voltage - Core: 2.50V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-MBGA, 144-Mini-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

JTAG Test And Emulation Port Timing
Table 22
Table 22. JTAG Port Timing
1
2
3
REV. A
System Outputs = DATA15–0, ADDR21–0, MS3–0, RD, WR, ACK, CLKOUT, BG, PF7–0, TIMEXP, DT0, DT1, TCLK0, TCLK1, RCLK0, RCLK1,
System Inputs = DATA15–0, ADDR21–0, RD, WR, ACK, BR, BG, PF7–0, DR0, DR1, TCLK0, TCLK1, RCLK0, RCLK1, TFS0, TFS1, RFS0, RFS1,
50 MHz max.
Parameter
Switching Characteristics
t
t
Timing Requirements
t
t
t
t
t
t
TFS0, TFS1, RFS0, RFS1, BMS.
CLKIN, RESET.
DTDO
DSYS
TCK
STAP
HTAP
SSYS
HSYS
TRSTW
OUTPUTS
and
SYSTEM
SYSTEM
INPUTS
Figure 24
TMS
TDO
TCK
TDI
TDO Delay from TCK Low
System Outputs Delay After TCK Low
TCK Period
TDI, TMS Setup Before TCK High
TDI, TMS Hold After TCK High
System Inputs Setup Before TCK Low
System Inputs Hold After TCK Low
TRST Pulsewidth
describe JTAG port operations.
3
t
DTDO
t
t
DSYS
STAP
Figure 24. JTAG Port Timing
t
TCK
2
t
HTA P
2
1
–39–
t
SSYS
t
Min
0
20
4t
HSYS
TCK
ADSP-2191M
Max
8
22
4
4
4
5
Unit
ns
ns
ns
ns
ns
ns
ns
ns