ADV7180KCP32Z-RL Analog Devices Inc, ADV7180KCP32Z-RL Datasheet - Page 99

• Manufacturer Part Number: ADV7180KCP32Z-RL
• Description: 10-bit 4x Oversampling SDTV Decoder
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7180KCP32Z-RL

• Design Resources: Low Cost Differential Video Receiver Using ADA4851 Amplifier and ADV7180 Video Decoder (CN0060) Low Cost Video Multiplexer for Video Switching Using ADA4853-2 Op Amp with Disable Function (CN0076)
• Applications: Digital Cameras, Mobile Phones, Portable Video
• Voltage - Supply, Analog: 1.71 V ~ 1.89 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Address Register
0x45
0x46
0x47
0x48
0x49
Raw Status 1
(read only)
Interrupt Status 2
(read only)
Interrupt Clear 2
(write only)
Interrupt Mask 2
(read/write)
Raw Status 2
(read only)
User Sub Map
Bit Description
CCAPD
Reserved
EVEN_FIELD
Reserved
MPU_STIM_INTRQ
CCAPD_Q
GEMD_Q
Reserved
SD_FIELD_CHNGD_Q
Reserved
Reserved
MPU_STIM_INTRQ_Q
CCAPD_CLR
GEMD_CLR
Reserved
SD_FIELD_CHNGD_CLR
Reserved
MPU_STIM_INTRQ_CLR
CCAPD_MSK
GEMD_MSK
Reserved
SD_FIELD_CHNGD_MSK
Reserved
MPU_STIM_INTRQ_MSK
SD_OP_50Hz; SD 60 Hz/50 Hz
frame rate at output
SD_V_LOCK
SD_H_LOCK
Reserved
SCM_LOCK
Reserved
Rev. F | Page 99 of 116
7 6 5 4 3 2 1 0
0
1
0
1
0
1
0
1
x x x
Bit
x x
x
x x
0 0
(Shading Indicates
Default State)
x
0
1
0
1
0
1
0
1
0
1
x x x
x x
0 0
0 0
x
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Comments
No CCAPD data detected—
VBI System 2
CCAPD data detected—VBI System 2
Current SD field is odd numbered
Current SD field is even numbered
MPU_STIM_INTRQ = 0
MPU_STIM_INTRQ = 1
Closed captioning not detected in the
input video signal—VBI System 2
Closed captioning data detected in the
video input signal—VBI System 2
Gemstar data not detected in the input
video signal—VBI System 2
Gemstar data detected in the input
video signal—VBI System 2
SD signal has not changed field from
odd to even or vice versa
SD signal has changed Field from odd to
even or vice versa
Not used
Not used
Manual interrupt not set
Manual interrupt set
Do not clear—VBI System 2
Clears CCAPD_Q bit—VBI System 2
Do not clear
Clears GEMD_Q bit
Do not clear
Clears SD_FIELD_CHNGD_Q bit
Not used
Do not clear
Clears MPU_STIM_INTRQ_Q bit
Masks CCAPD_Q bit—VBI System 2
Unmasks CCAPD_Q bit—VBI System 2
Masks GEMD_Q bit—VBI System 2
Unmasks GEMD_Q bit—VBI System 2
Not used
Masks SD_FIELD_CHNGD_Q bit
Unmasks SD_FIELD_CHNGD_Q bit
Not used
Masks MPU_STIM_INTRQ_Q bit
Unmasks MPU_STIM_INTRQ_Q bit
SD 60 Hz signal output
SD 50 Hz signal output
SD vertical sync lock not established
SD vertical sync lock established
SD horizontal sync lock not established
SD horizontal sync lock established
Not used
SECAM lock not established
SECAM lock established
Not used
Note that interrupt in
Notes
These bits are status
bits only; they cannot be
cleared or masked;
Register 0x46 is used for
this purpose
These bits can be cleared
or masked by Register 0x47
and Register 0x48, res-
pectively; note that the
interrupt in Register 0x46
for the CCAP, Gemstar,
CGMS, and WSS data uses
the Mode 1 data slicer
Note that interrupt in
Register 0x46 for the
CCAP, Gemstar, CGMS,
and WSS data uses the
Mode 1 data slicer
Register 0x46 for the
CCAP, Gemstar, CGMS,
and WSS data uses the
Mode 1 data slicer
These bits are status
bits only; they cannot be
cleared or masked;
Register 0x4A is used for
this purpose
ADV7180