CRD42L51 Cirrus Logic Inc, CRD42L51 Datasheet - Page 51

• Manufacturer Part Number: CRD42L51
• Description: Ref Bd Low-voltage Stereo Codec
• Manufacturer: Cirrus Logic Inc

CS42L51
Speed Mode (SPEED[1:0])
Default: 01
11 - Quarter-Speed Mode (QSM) - 4 to 12.5 kHz sample rates
10 - Half-Speed Mode (HSM) - 12.5 to 25 kHz sample rates
01 - Single-Speed Mode (SSM) - 4 to 50 kHz sample rates
00 - Double-Speed Mode (DSM) - 50 to 100 kHz sample rates
Function:
Sets the appropriate speed mode for the CODEC in Master or Slave Mode. QSM is optimized for 8 kHz sam-
ple rate and HSM is optimized for 16 kHz sample rate. These bits are ignored when the AUTO bit is enabled
(see
Auto-Detect Speed Mode (AUTO)
above).
Tri-State Serial Port Interface (3ST_SP)
Default: 0
0 - Disable
1 - Enable
Function:
When enabled and the device is configured as a master, all serial port outputs are place in a high impedance
state. If the serial port is configured as a slave, only the SDOUT pin will be placed in a high-impedance state.
The other signals will remain as inputs.
Power Down MIC X (PDN_MICX)
Default: 1
0 - Disable
1 - Enable
Function:
When enabled, the microphone pre-amplifier for channel x will be in a power-down state.
Power Down MIC BIAS (PDN_MICBIAS)
Default: 1
0 - Disable
1 - Enable
Function:
When enabled, the microphone bias circuit will be in a power-down state.
MCLK Divide By 2 (MCLKDIV2)
Default: 0
0 - Disabled
1 - Divide by 2
Function:
Divides the input MCLK by 2 prior to all internal circuitry. This bit is ignored when the AUTO bit is disabled
in Slave Mode.
DS679F1
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