CRD42L51 Cirrus Logic Inc, CRD42L51 Datasheet - Page 70

• Manufacturer Part Number: CRD42L51
• Description: Ref Bd Low-voltage Stereo Codec
• Manufacturer: Cirrus Logic Inc

70
6.22
Note: The DATA_SEL[1:0] bits in reg09h must be set to ‘01’b to enable function control in this register.
6.23
ALC_ENB
Reserved
7
7
Limiter Attack Rate Register (Address 1Bh)
Limiter Attack Rate (ARATE[5:0])
Default: 000000
Function:
Sets the rate at which the limiter attenuates the analog output from levels above the maximum setting in the
limiter threshold register.
The limiter attack rate is user-selectable but is also a function of the sampling frequency, Fs, and the
DAC_SZC setting unless the disable bit is enabled.
ALC Enable & Attack Rate (Address 1Ch)
ALC Enable (ALC_ENX)
Default: 0
0 - Disabled
1 - Enabled
Function:
Enables automatic level control for ADC channel x.
Note:
ALC Attack Rate (ARATE[5:0])
Default: 000000
Function:
Sets the rate at which the ALC attenuates the analog input from levels above the maximum setting in the
ALC threshold register.
The limiter attack rate is user-selectable but is also a function of the sampling frequency, Fs, and the SOFTx
& ZCROSSx bit settings unless the disable bit for each function is enabled.
Binary Code
Binary Code
000000
000000
111111
111111
ALC_ENA
When the ALC is enabled, the Attenuator and PGA volume is automatically controlled and should
not be adjusted manually.
Reserved
···
···
6
6
ALC_ARATE5 ALC_ARATE4 ALC_ARATE3 ALC_ARATE2 ALC_ARATE1 ALC_ARATE0
ARATE5
5
5
Slowest Attack
Slowest Attack
Attack Time
Fastest Attack
Attack Time
Fastest Attack
···
···
ARATE4
4
4
ARATE3
3
3
ARATE2
2
2
ARATE1
1
1
CS42L51
ARATE0
DS679F1
0
0