CS2300CP-CZZR Cirrus Logic Inc, CS2300CP-CZZR Datasheet - Page 13

• Manufacturer Part Number: CS2300CP-CZZR
• Description: IC General Purpose PLL LCO
• Manufacturer: Cirrus Logic Inc
• Type: Fanout Distribution, Fractional N Synthesizerr

Specifications of CS2300CP-CZZR

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 75MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Frequency-max: 75MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1494 - BOARD EVAL GEN PURPOSE PLL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1405-2; CS2300CP-CZZR

DS843F1
5. APPLICATIONS
5.1
5.2
5.2.1
Timing Reference Clock
The internal LC oscillator is used to generate the internal timing reference clock (see
Overview” on page 11
must be connected between the FILTP and FILTN pins and the FILTN pin must be connected to ground as
shown in
Frequency Reference Clock Input, CLK_IN
The frequency reference clock input (CLK_IN) is used by the Digital PLL and Fractional-N Logic block to
dynamically generate a fractional-N value for the Frequency Synthesizer (see
on page
block then translates the desired ratio based off of CLK_IN to one based off of the internal LCO. This allows
the low-jitter internal LCO to be used as the clock which the Frequency Synthesizer multiplies while main-
taining synchronicity with the frequency reference clock through the Digital PLL. The allowable frequency
range for CLK_IN is found in the
CLK_IN Skipping Mode
CLK_IN skipping mode allows the PLL to maintain lock even when the CLK_IN signal has missing pulses
for up to
skipping mode can only be used when the CLK_IN frequency is below
within
20
12). The Digital PLL first compares the CLK_IN frequency to the PLL output. The Fractional-N logic
Figure
20
ms of being removed. The ClkSkipEn bit enables this function.
ms (t
9.
CS
Figure 9. External Component Requirements for LCO
) at a time (see
for information on how this internal clock is used by the CS2300). A single 0.1 µF cap
“AC Electrical Characteristics” on page
“AC Electrical Characteristics” on page 7
FILTN
C
FILTP
7.
80
kHz and CLK_IN is reapplied
“Hybrid Analog-Digital PLL”
for specifications). CLK_IN
section 4 “Architecture
CS2300-CP
13